本公众号【读芯树:duxinshu_PD】主要介绍数字集成电路物理设计相关知识,才疏学浅,如有错误,欢迎指正交流学习。
这是集成电路物理设计的第三个系列【File】的第三篇文章,本篇文章主要介绍DEF File相关内容:
1,什么是DEF File?
DEF = Design Exchange Format
DEF File用于描述电路物理信息的一种文件格式,它描述了standard cell/Macro的位置信息及其连接关系,可以通过DEF文件进行不同工具间的信息传递,保持设计内容不变。
DEF file中不仅包含物理信息(位置信息)也包含逻辑信息(连接关系)。
2,DEF File介绍
[VERSION statement] /DEF File version
[DIVIDERCHAR statement] /层次结构分隔符,默认值为“/”
[BUSBITCHARS statement] /总线符号,默认值为“[]”
[DESIGN statement] /design name
[TECHNOLOGY statement] /technology name
[UNITS statement] /长度精度 (2000=0.5nm)
[DIRAREA statement] /die area
[ROWS statement]
ROW rowName siteName origX origY siteOrient [DO numX BY numY STEP stepX stepY]
[TRACKS statement]
TRACKS X|Y start DO numTracks STEP space LAYER layerName
[GCELLGRID statement]
GCELLGRID X|Y start DO numColumns+1 | numRows+1 STEP space
[VIAS statemetn]
[NONDUFAULTRULES statement]
defines any nondefault rules used in this design
[COMPONENTS section]
define design components, their location, and associated attributes
[PINS section]
define external pins
[BLOCKAGES section]
define placement and routing blockages
[FILES section]
[SPECIALNETS section]
[NETS section]
[SCANCHAINS section]
[GROUPS section]
[BEGINEXT section]
[END DESIGN]
3,APR 写出DEF File cmd
FC/ICC2 cmd:
Innovus cmd:
>defOut -floorplan -netlist -routing ./design.def.gz
>writeFPlanSccript -sections {blocks boundarys constraiints globalNetConnect groups netGroupAndBusGuide partitions pinBlockages pins placeBlockages routeBlockages row} -fileName ./design.floorplan.tcl
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