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linux nandflash
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版权声明：本文为博主原创文章，遵循 CC 4.0 BY-SA 版权协议，转载请附上原文出处链接和本声明。
转自：https://blog.csdn.net/chenliang0224/article/details/79372559
————————————————
版权声明：本文为CSDN博主「JDSH0224」的原创文章，遵循 CC 4.0 BY-SA 版权协议，转载请附上原文出处链接及本声明。
原文链接：https://blog.csdn.net/chenliang0224/article/details/79372559

1. 前言：

1.1 先分析下nandflash的布局、操作结构


由图可以看出一片Nand flash为一个设备(device)，其数据存储分层为：

a.  1个设备（device）=1024个块(Blocks)，块也是Nand flash擦除操作的最小单位。

b.  1个块（block) = 64页(Pages)，页是Nand flash写入的最小单位，对于每一个页，由数据块区域和空闲区域。数据区，也容易理解，就是存储一些数据，而对于空闲区，一般也叫做OOB(out of Band)，这个区域，是基于Nand flash的硬件特性设计的，Nand flash在数据读写的时候很容易错误，所以为了保证数据的正确性，必须要有对应的检测和纠错的机制，此机制就被叫做ECC，所以设计了该多余的区域，用来放置数据的校验值。

c.  1个页(page) = 数据块大小(2K)+OOB块大小(64Bytes)

那么通过上面我们就可以计算出怎么访问一个物理地址：块大小*块号+页大小*页号+页内陆址。

从硬件的图来看，对于K9F1G08X0C这款芯片，其容量为132MB，那么就应该需要28条地址先，而现在只有8条地址线，对于Nand flash就导入了地址周期的概念，对于该款flash，所以需要4个周期：2个列地址(Column)周期和2个行地址(ROW)周期。从下面的功能框图来看，对于列地址A0--A11，就是页内陆址，地址范围就是0--4094，与页内陆址(2K+64)吻合，其实对于页内陆址，其实只需要A0-A10，而对于多出来的A11，是用来表示页内的oob区域。那么对于A12-A27就是用来表示属于哪一个块和块里面的哪一个页号。

1.2 要对nandflash操作，比如读取一页数据、写入一页数据，都要发送对应的命令，而且要符合硬件的规定，如图：


从上图可以看出，在Read读取数据时需两个周期Cycle，即分两次发送对应的命令，第一次是0x00，第二次是0x30，而且两次中间要发送对应的地址行地址（页）+列地址（页内陆址），这个要特别注意，在下面的源码读取数据时会分析到。

由于篇幅原因，关于nandflash中oob、bbt、ecc，详见：点击打开链接

2. nandflash相关结构体

a. struct nuc970_nand_info

  1. struct nuc970_nand_info {
  2. struct nand_hw_control  controller; //nandflash驱动控制器操作结构体
  3. struct mtd_info         mtd; //nandflash分区操作结构体
  4. struct nand_chip        chip; //芯片操作结构体
  5. struct mtd_partition    *parts;     //nandflash分区数组信息
  6. int                     nr_parts;   //nandflash分区数组个数
  7. struct platform_device  *pdev; //指向dev.c中的设备
  8. struct clk              *clk; //nandflash控制器时钟
  9. struct clk              *fmi_clk; //fmi控制器时钟
  11. void __iomem            *reg; //寄存器
  12. int                     eBCHAlgo; //BCH ECC算法
  13. int                     m_i32SMRASize; //见datasheet  FMI__NANDRACTL  表示oob的字节数
  14. int                     m_ePageSize; //页大小
  16. unsigned char *         pnand_vaddr; //nandflash虚拟地址
  17. unsigned char *         pnand_phyaddr; //nandflash物理地址
  19. int                     m_i32MyShowTime; //???相当于信号量
  20. spinlock_t              lock;
  21. };

b. struct nand_hw_control

  1. struct nand_hw_control {
  2. spinlock_t lock;
  3. struct nand_chip *active; //芯片操作结构体
  4. wait_queue_head_t wq;
  5. };

c. struct nand_chip

  1. struct nand_chip {
  2. void __iomem *IO_ADDR_R;
  3. void __iomem *IO_ADDR_W;
  5. uint8_t (*read_byte)(struct mtd_info *mtd); //读一个byte
  6. 	u16 (*read_word)(struct mtd_info *mtd); //读一个word
  7. void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len); //写一个缓冲区数据
  8. void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len); //读一个缓冲区数据
  9. void (*select_chip)(struct mtd_info *mtd, int chip); //片选
  10. int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip); //坏块
  11. int (*block_markbad)(struct mtd_info *mtd, loff_t ofs); //坏块标记
  12. void (*cmd_ctrl)(struct mtd_info *mtd, int dat, unsigned int ctrl); //命令控制
  13. int (*init_size)(struct mtd_info *mtd, struct nand_chip *this,
  14. 			u8 *id_data); //？？？
  15. int (*dev_ready)(struct mtd_info *mtd); //设备忙状态？
  16. void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column,
  17. int page_addr); //命令功能
  18. int(*waitfunc)(struct mtd_info *mtd, struct nand_chip *this); //？？？
  19. void (*erase_cmd)(struct mtd_info *mtd, int page); //擦除命令
  20. int (*scan_bbt)(struct mtd_info *mtd); //bbt:bad blockta(即坏块表)，扫描坏块表
  21. int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state,
  22. int status, int page);
  23. int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
  24. uint32_t offset, int data_len, const uint8_t *buf,
  25. int oob_required, int page, int cached, int raw);
  26. int (*onfi_set_features)(struct mtd_info *mtd, struct nand_chip *chip,
  27. int feature_addr, uint8_t *subfeature_para);
  28. int (*onfi_get_features)(struct mtd_info *mtd, struct nand_chip *chip,
  29. int feature_addr, uint8_t *subfeature_para);
  31. int chip_delay; //芯片时序特性
  32. unsigned int options;
  33. unsigned int bbt_options; //坏块表选项
  35. int page_shift;
  36. int phys_erase_shift;
  37. int bbt_erase_shift;
  38. int chip_shift;
  39. int numchips;
  40. uint64_t chipsize;
  41. int pagemask;
  42. int pagebuf;
  43. unsigned int pagebuf_bitflips;
  44. int subpagesize;
  45. uint8_t cellinfo;
  46. int badblockpos;
  47. int badblockbits;
  49. int onfi_version; //ONFI版本
  50. struct nand_onfi_paramsonfi_params;
  52. flstate_t state;
  54. uint8_t *oob_poi;
  55. struct nand_hw_control *controller;
  56. struct nand_ecclayout *ecclayout;
  58. struct nand_ecc_ctrl ecc;
  59. struct nand_buffers *buffers;
  60. struct nand_hw_control hwcontrol;
  62. uint8_t *bbt;
  63. struct nand_bbt_descr *bbt_td; //坏块表
  64. struct nand_bbt_descr *bbt_md;
  66. struct nand_bbt_descr *badblock_pattern;
  68. void *priv;
  69. };

d. struct mtd_partition

  1. struct mtd_partition {
  2. char *name;			/* identifier string */
  3. uint64_t size;			/* partition size */
  4. uint64_t offset;		/* offset within the master MTD space */
  5. uint32_t mask_flags;		/* master MTD flags to mask out for this partition */
  6. struct nand_ecclayout *ecclayout;/* out of band layout for this partition (NAND only) */
  7. };

e. struct nand_ecclayout

  1. struct nand_ecclayout {
  2. 	__u32 eccbytes; //表示使用几个ecc字节
  3. 	__u32 eccpos[MTD_MAX_ECCPOS_ENTRIES_LARGE]; //表示ecc占用的位置，因为现在一版大页面4kbyte也就128个，所以数组为128，以后有更大页面的，这里也要改了。
  4. 	__u32 oobavail; //有几个oob可用，这个跟下面的成员有点像，一般用下面的
  5. struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES_LARGE]; //定义oob有效个数，从哪开始等
  6. };

d. struct nand_oobfree

  1. struct nand_oobfree {
  2. 	__u32 offset;
  3. 	__u32 length;
  4. };

e. struct mtd_info

  1. struct mtd_info {
  2. 	u_char type; //flash类型，如MTD_NORFLASH，MTD_NANDFLASH
  3. uint32_t flags; //MTD属性标志，MTD_WRITEABLE,MTD_NO_ERASE等
  4. uint64_t size;	 //mtd设备的大小
  6. /* "Major" erase size for the device. Naïve users may take this
  7. 	* to be the only erase size available, or may use the more detailed
  8. 	* information below if they desire
  9. 	*/
  10. uint32_t erasesize; //MTD设备的擦除单元大小，对于NandFlash来说就是Block的大小
  11. /* Minimal writable flash unit size. In case of NOR flash it is 1 (even
  12. 	* though individual bits can be cleared), in case of NAND flash it is
  13. 	* one NAND page (or half, or one-fourths of it), in case of ECC-ed NOR
  14. 	* it is of ECC block size, etc. It is illegal to have writesize = 0.
  15. 	* Any driver registering a struct mtd_info must ensure a writesize of
  16. 	* 1 or larger.
  17. 	*/
  18. uint32_t writesize; //写大小, 对于norFlash是字节,对nandFlash为一页
  20. /*
  21. 	* Size of the write buffer used by the MTD. MTD devices having a write
  22. 	* buffer can write multiple writesize chunks at a time. E.g. while
  23. 	* writing 4 * writesize bytes to a device with 2 * writesize bytes
  24. 	* buffer the MTD driver can (but doesn't have to) do 2 writesize
  25. 	* operations, but not 4. Currently, all NANDs have writebufsize
  26. 	* equivalent to writesize (NAND page size). Some NOR flashes do have
  27. 	* writebufsize greater than writesize.
  28. 	*/
  29. uint32_t writebufsize; //
  31. uint32_t oobsize;   // Amount of OOB data per block (e.g. 16)  OOB字节数
  32. uint32_t oobavail;  // Available OOB bytes per block 可用的OOB字节数
  34. /*
  35. 	* If erasesize is a power of 2 then the shift is stored in
  36. 	* erasesize_shift otherwise erasesize_shift is zero. Ditto writesize.
  37. 	*/
  38. unsigned int erasesize_shift;
  39. unsigned int writesize_shift;
  40. /* Masks based on erasesize_shift and writesize_shift */
  41. unsigned int erasesize_mask;
  42. unsigned int writesize_mask;
  44. /*
  45. 	* read ops return -EUCLEAN if max number of bitflips corrected on any
  46. 	* one region comprising an ecc step equals or exceeds this value.
  47. 	* Settable by driver, else defaults to ecc_strength.  User can override
  48. 	* in sysfs.  N.B. The meaning of the -EUCLEAN return code has changed;
  49. 	* see Documentation/ABI/testing/sysfs-class-mtd for more detail.
  50. 	*/
  51. unsigned int bitflip_threshold;
  53. // Kernel-only stuff starts here.
  54. const char *name;
  55. int index;
  57. /* ECC layout structure pointer - read only! */
  58. struct nand_ecclayout *ecclayout;
  60. /* max number of correctible bit errors per ecc step */
  61. unsigned int ecc_strength;
  63. /* Data for variable erase regions. If numeraseregions is zero,
  64. 	* it means that the whole device has erasesize as given above.
  65. 	*/
  66. int numeraseregions;
  67. struct mtd_erase_region_info *eraseregions; //可变擦除区域
  69. /*
  70. 	* Do not call via these pointers, use corresponding mtd_*()
  71. 	* wrappers instead.
  72. 	*/
  74. //擦除函数
  75. int (*_erase) (struct mtd_info *mtd, struct erase_info *instr);
  76. int (*_point) (struct mtd_info *mtd, loff_t from, size_t len,
  77. size_t *retlen, void **virt, resource_size_t *phys);
  78. int (*_unpoint) (struct mtd_info *mtd, loff_t from, size_t len);
  79. unsigned long (*_get_unmapped_area) (struct mtd_info *mtd,
  80. unsigned long len,
  81. unsigned long offset,
  82. unsigned long flags);
  84. // 读写flash函数					 
  85. int (*_read) (struct mtd_info *mtd, loff_t from, size_t len,
  86. size_t *retlen, u_char *buf);
  87. int (*_write) (struct mtd_info *mtd, loff_t to, size_t len,
  88. size_t *retlen, const u_char *buf);
  89. int (*_panic_write) (struct mtd_info *mtd, loff_t to, size_t len,
  90. size_t *retlen, const u_char *buf);
  92. //带oob读写Flash函数			 
  93. int (*_read_oob) (struct mtd_info *mtd, loff_t from,
  94. 			struct mtd_oob_ops *ops);
  95. int (*_write_oob) (struct mtd_info *mtd, loff_t to,
  96. 			struct mtd_oob_ops *ops);
  97. int (*_get_fact_prot_info) (struct mtd_info *mtd, struct otp_info *buf,
  98. size_t len);
  99. int (*_read_fact_prot_reg) (struct mtd_info *mtd, loff_t from,
  100. size_t len, size_t *retlen, u_char *buf);
  101. int (*_get_user_prot_info) (struct mtd_info *mtd, struct otp_info *buf,
  102. size_t len);
  103. int (*_read_user_prot_reg) (struct mtd_info *mtd, loff_t from,
  104. size_t len, size_t *retlen, u_char *buf);
  105. int (*_write_user_prot_reg) (struct mtd_info *mtd, loff_t to,
  106. size_t len, size_t *retlen, u_char *buf);
  107. int (*_lock_user_prot_reg) (struct mtd_info *mtd, loff_t from,
  108. size_t len);
  109. int (*_writev) (struct mtd_info *mtd, const struct kvec *vecs,
  110. unsigned long count, loff_t to, size_t *retlen);
  111. void (*_sync) (struct mtd_info *mtd);
  112. int (*_lock) (struct mtd_info *mtd, loff_t ofs, uint64_t len);
  113. int (*_unlock) (struct mtd_info *mtd, loff_t ofs, uint64_t len);
  114. int (*_is_locked) (struct mtd_info *mtd, loff_t ofs, uint64_t len);
  115. int (*_block_isbad) (struct mtd_info *mtd, loff_t ofs);
  116. int (*_block_markbad) (struct mtd_info *mtd, loff_t ofs);
  117. int (*_suspend) (struct mtd_info *mtd);
  118. void (*_resume) (struct mtd_info *mtd);
  119. /*
  120. 	* If the driver is something smart, like UBI, it may need to maintain
  121. 	* its own reference counting. The below functions are only for driver.
  122. 	*/
  123. int (*_get_device) (struct mtd_info *mtd);
  124. void (*_put_device) (struct mtd_info *mtd);
  126. /* Backing device capabilities for this device
  127. 	* - provides mmap capabilities
  128. 	*/
  129. struct backing_dev_info *backing_dev_info;
  131. struct notifier_block reboot_notifier;  /* default mode before reboot */
  133. /* ECC status information */
  134. struct mtd_ecc_stats ecc_stats;
  135. /* Subpage shift (NAND) */
  136. int subpage_sft;
  138. void *priv; //指向chip，     struct nand_chip *chip
  140. struct module *owner;
  141. struct device dev;
  142. int usecount;
  143. };

3. struct platform_device 

  1. static u64 nuc970_device_fmi_dmamask = 0xffffffffUL;
  2. struct platform_device nuc970_device_fmi = {
  3. .name		  = "nuc970-fmi",
  4. .id		  = -1,
  5. .num_resources	  = ARRAY_SIZE(nuc970_fmi_resource),
  6. .resource	  = nuc970_fmi_resource,
  7. .dev              = {
  8. 		.dma_mask = &nuc970_device_fmi_dmamask,
  9. 		.coherent_dma_mask = 0xffffffffUL
  10. 	}
  11. };
  13. static struct resource nuc970_fmi_resource[] = {
  14. [0] = {
  15. .start = NUC970_PA_FMI,
  16. .end   = NUC970_PA_FMI + NUC970_SZ_FMI - 1,
  17. .flags = IORESOURCE_MEM,
  18. },
  19. [1] = {
  20. .start = IRQ_FMI,
  21. .end   = IRQ_FMI,
  22. .flags = IORESOURCE_IRQ,
  23. }
  24. };
  26. static u64 nuc970_device_fmi_dmamask = 0xffffffffUL;
platform_add_devices(&nuc970_device_fmi, 1);

fmi设备注册。

4. static struct platform_driver

  1. static struct platform_driver nuc970_nand_driver = {
  2. .driver = {
  3. .name   = "nuc970-fmi",
  4. .owner  = THIS_MODULE,
  5. },
  6. .probe      = nuc970_nand_probe,
  7. .remove     = nuc970_nand_remove,
  8. };

设备和驱动通过名称“nuc970-fmi”匹配，调用.probe=nuc970_nand_probe;

5. probe(...)

在分析nuc970_nand_probe(...)函数之前，先看下驱动的几个API

nandflash硬件ECC初始化：

  1. static void nuc970_nand_hwecc_init (struct mtd_info *mtd)
  2. {
  3. struct nuc970_nand_info *nand = container_of(mtd, struct nuc970_nand_info, mtd);
  5. writel ( readl(REG_SMCSR)|0x1, REG_SMCSR);    // reset SM controller
  7. // Redundant area size
  8. writel( nand->m_i32SMRASize , REG_SMREACTL );
  10. // Protect redundant 3 bytes
  11. // because we need to implement write_oob function to partial data to oob available area.
  12. // Please note we skip 4 bytes
  13. writel( readl(REG_SMCSR) | 0x100, REG_SMCSR);
  15. // To read/write the ECC parity codes automatically from/to NAND Flash after data area field written.
  16. writel( readl(REG_SMCSR) | 0x10, REG_SMCSR);
  18. if ( nand->eBCHAlgo >= 0 ) {
  19. // Set BCH algorithm  设置ECC算法
  20. writel( (readl(REG_SMCSR) & (~0x007C0000)) | g_i32BCHAlgoIdx[nand->eBCHAlgo], REG_SMCSR);
  22. // Enable H/W ECC, ECC parity check enable bit during read page
  23. //使能ECC算法 | 使能读取页数据后，使用字段ecc检查
  24. writel( readl(REG_SMCSR) | 0x00800080, REG_SMCSR);
  26. } else  {
  27. // Disable H/W ECC / ECC parity check enable bit during read page
  28. //禁止ECC | 读取数据后，禁止使用字段
  29. writel( readl(REG_SMCSR) & (~0x00800000) &(~0x80), REG_SMCSR);
  30. }
  31. }

硬件ECC禁止：

  1. static void nuc970_nand_hwecc_fini (struct mtd_info *mtd)
  2. {
  3. struct nand_chip *chip = mtd->priv;
  4. if ( chip->ecc.mode == NAND_ECC_HW_OOB_FIRST )
  5. writel(readl(REG_SMCSR)&(~0x00800000), REG_SMCSR); // ECC disable
  6. }

NandFlash初始化，包括nandflash选择使能，通讯时序设置，片选CS0，写保护寄存器开启，软复位nandflash：

  1. static void nuc970_nand_initialize ( void )
  2. {
  3. ENTER() ;
  5. // Enable SM_EN  该寄存器还包括eMMC,这里使能nandflash功能
  6. writel( NAND_EN, REG_NAND_FMICSR );
  8. // Timing control
  9. // writel(0x3050b, REG_SMTCR);
  10. // tCLS= (2+1)TAHB,
  11. // tCLH= (2*2+2)TAHB,
  12. // tALS= (2*1+1)TAHB,
  13. // tALH= (2*2+2)TAHB,
  14. writel(0x20305, REG_SMTCR); //时序控制
  16. // Enable SM_CS0 片选CS0
  17. writel((readl(REG_SMCSR)&(~0x06000000))|0x04000000, REG_SMCSR);
  19. //nandflash 写保护寄存器， 1表示没有写保护，数据是可写的
  20. writel(0x1, REG_NFECR); /* un-lock write protect */
  22. // NAND Reset 软复位
  23. writel(readl(REG_SMCSR) | 0x1, REG_SMCSR);    // software reset
  25. LEAVE();
  26. }

页大小决定了ecc空间，具体如下：

  1. static const int g_i32ParityNum[ePageSize_CNT][eBCH_CNT] = {
  2. { 8,    15,     23,     29,     -1  },  // For 512
  3. { 32,   60,     92,     116,    90  },  // For 2K
  4. { 64,   120,    184,    232,    180 },  // For 4K
  5. { 128,  240,    368,    464,    360 },  // For 8K
  6. };

硬件ecc选择bch算法：

  1. static int nuc970_hwecc_choice_bch_algorithm ( E_PAGESIZE ePagesize, int oob_size, int oob_available )
  2. {
  3. int i;
  4. /* Rule: select a BCH algorithm as the oob_size/2 large than parity number */
  5. for ( i=eBCH_T24; i>=0; i-- )
  6. if ( g_i32ParityNum[ePagesize][i] > 0 )
  7. //oob_size-oob_available-DEF_RESERVER_OOB_SIZE_FOR_MARKER=存储ecc校验空间，
  8. //如果g_i32ParityNum[ePagesize][i]值小于该空间表示可以存储ecc的校验值，即
  9. //可选择该硬件bch算法.
  10. if ( g_i32ParityNum[ePagesize][i] <= (oob_size-oob_available-DEF_RESERVER_OOB_SIZE_FOR_MARKER) )  // use half ecc size
  11. break;
  12. return i;
  13. }

nuc970选择ECC算法：

  1. static void nuc970_choice_bch_algo ( struct mtd_info *mtd, int page )
  2. {
  3. int i;
  4. struct nuc970_nand_info *nand = container_of(mtd, struct nuc970_nand_info, mtd);
  5. struct mtd_partition *part;
  6. struct nand_ecclayout *part_ecclayout;
  7. int BCHAlgoIdx=0;
  8. int SMRASize=0;
  10. u32 page_addr = page * mtd->writesize; //页地址*1页的大小
  12. for ( i=0; i<nand->nr_parts; i++ )
  13. {
  14. part = &nand->parts[i];
  15. part_ecclayout = part->ecclayout;
  16. if ( part_ecclayout && part_ecclayout != mtd->ecclayout ) { //ecclayout是否匹配？
  17. if ( part->offset <= page_addr && page_addr < part->offset+part->size ) //判定page_addr地址是否在当前分区范围内？
  18. {
  19. struct nuc970_nand_ecclayout * pSNUC970NandEccLayout=(struct nuc970_nand_ecclayout *)part_ecclayout;
  20. BCHAlgoIdx = pSNUC970NandEccLayout->m_BCHAlgoidx;
  21. SMRASize = pSNUC970NandEccLayout->m_SMRASize;
  22. break;
  23. }
  24. }
  25. }
  26. if ( i == nand->nr_parts ) //相等表示未找到对应的分区
  27. {
  28. //chp  BCHAlgoIdx = nuc970_hwecc_choice_bch_algorithm ( nand->m_ePageSize, mtd->oobsize, mtd->oobavail );
  29. BCHAlgoIdx = nuc970_nand_SYSTEM_oob.m_BCHAlgoidx;
  30. SMRASize = mtd->oobsize;
  31. }
  33. if ( BCHAlgoIdx != nand->eBCHAlgo ) //bch算法进行了更新？
  34. {
  35. if ( BCHAlgoIdx >= 0 )
  36. printk("(0x%08X)BCH change to %s: %dB\n",  page_addr, g_pcBCHAlgoIdx[BCHAlgoIdx],  g_i32ParityNum[nand->m_ePageSize][BCHAlgoIdx] );
  37. else
  38. printk("(0x%08X)BCH change to No-ECC\n",  page_addr );
  39. }
  40. nand->eBCHAlgo = BCHAlgoIdx;
  42. if ( SMRASize != nand->m_i32SMRASize )
  43. printk("(0x%08X)SMRA size change to %dB\n",  page_addr, SMRASize );
  44. nand->m_i32SMRASize = SMRASize;
  45. }

nandflash ecc数据纠正：

  1. void fmiSM_CorrectData_BCH(u8 ucFieidIndex, u8 ucErrorCnt, u8* pDAddr)
  2. {
  3. u32 uaData[24], uaAddr[24];
  4. u32 uaErrorData[4];
  5. u8  ii, jj;
  6. u32 uPageSize;
  7. u32 field_len, padding_len, parity_len;
  8. u32 total_field_num;
  9. u8  *smra_index;
  11. ENTER();
  13. //--- assign some parameters for different BCH and page size
  14. switch (readl(REG_SMCSR) & 0x007C0000) //获取nandflash寄存器中BCH算法
  15. {
  16. case BCH_T24:
  17. field_len   = 1024;
  18. padding_len = BCH_PADDING_LEN_1024;
  19. parity_len  = BCH_PARITY_LEN_T24;
  20. break;
  21. case BCH_T15:
  22. field_len   = 512;
  23. padding_len = BCH_PADDING_LEN_512;
  24. parity_len  = BCH_PARITY_LEN_T15;
  25. break;
  26. case BCH_T12:
  27. field_len   = 512;
  28. padding_len = BCH_PADDING_LEN_512;
  29. parity_len  = BCH_PARITY_LEN_T12;
  30. break;
  31. case BCH_T8:
  32. field_len   = 512;
  33. padding_len = BCH_PADDING_LEN_512;
  34. parity_len  = BCH_PARITY_LEN_T8;
  35. break;
  36. case BCH_T4:
  37. field_len   = 512;
  38. padding_len = BCH_PADDING_LEN_512;
  39. parity_len  = BCH_PARITY_LEN_T4;
  40. break;
  41. default:
  42. printk("NAND ERROR: %s(): invalid SMCR_BCH_TSEL = 0x%08X\n", __FUNCTION__, (u32)(readl(REG_SMCSR) & 0x7C0000));
  43. LEAVE();
  44. return;
  45. }
  47. uPageSize = readl(REG_SMCSR) & 0x00030000; //获取nandflash中页大小
  48. switch (uPageSize)
  49. {
  50. case 0x30000:  total_field_num = 8192 / field_len; break;
  51. case 0x20000:  total_field_num = 4096 / field_len; break;
  52. case 0x10000:  total_field_num = 2048 / field_len; break;
  53. case 0x00000:  total_field_num =  512 / field_len; break;
  54. default:
  55. printk("NAND ERROR: %s(): invalid SMCR_PSIZE = 0x%08X\n", __FUNCTION__, uPageSize);
  56. LEAVE();
  57. return;
  58. }
  60. //--- got valid BCH_ECC_DATAx and parse them to uaData[]
  61. // got the valid register number of BCH_ECC_DATAx since one register include 4 error bytes
  62. jj = ucErrorCnt/4;
  63. jj ++;
  64. if (jj > 6)
  65. jj = 6;     // there are 6 BCH_ECC_DATAx registers to support BCH T24
  67. for(ii=0; ii<jj; ii++)
  68. {
  69. uaErrorData[ii] = readl(REG_BCH_ECC_DATA0 + ii*4); //读取ECC数据
  70. }
  72. for(ii=0; ii<jj; ii++)
  73. {
  74. uaData[ii*4+0] = uaErrorData[ii] & 0xff;
  75. uaData[ii*4+1] = (uaErrorData[ii]>>8) & 0xff;
  76. uaData[ii*4+2] = (uaErrorData[ii]>>16) & 0xff;
  77. uaData[ii*4+3] = (uaErrorData[ii]>>24) & 0xff;
  78. }
  80. //--- got valid REG_BCH_ECC_ADDRx and parse them to uaAddr[]
  81. // got the valid register number of REG_BCH_ECC_ADDRx since one register include 2 error addresses
  82. jj = ucErrorCnt/2;
  83. jj ++;
  84. if (jj > 12)
  85. jj = 12;    // there are 12 REG_BCH_ECC_ADDRx registers to support BCH T24
  87. for(ii=0; ii<jj; ii++)
  88. {
  89. uaAddr[ii*2+0] = readl(REG_BCH_ECC_ADDR0 + ii*4) & 0x07ff;   // 11 bits for error address   nandflash ecc错误字节地址
  90. uaAddr[ii*2+1] = (readl(REG_BCH_ECC_ADDR0 + ii*4)>>16) & 0x07ff;
  91. }
  93. //--- pointer to begin address of field that with data error
  94. pDAddr += (ucFieidIndex-1) * field_len;
  96. //--- correct each error bytes
  97. for(ii=0; ii<ucErrorCnt; ii++)
  98. {
  99. // for wrong data in field
  100. if (uaAddr[ii] < field_len)
  101. {
  102. #ifdef NUC970_NAND_DEBUG
  103. printk("BCH error corrected for data: address 0x%08X, data [0x%02X] --> ",
  104. (unsigned int)(pDAddr+uaAddr[ii]), (unsigned int)(*(pDAddr+uaAddr[ii])));
  105. #endif
  106. *(pDAddr+uaAddr[ii]) ^= uaData[ii]; //异或，计算ECC，即读取数据的ECC和nandflash中的ecc进行异或比较
  108. #ifdef NUC970_NAND_DEBUG
  109. printk("[0x%02X]\n", *(pDAddr+uaAddr[ii]));
  110. #endif
  111. }
  112. // for wrong first-3-bytes in redundancy area
  113. else if (uaAddr[ii] < (field_len+3))
  114. {
  115. uaAddr[ii] -= field_len;
  116. uaAddr[ii] += (parity_len*(ucFieidIndex-1));    // field offset
  118. #ifdef NUC970_NAND_DEBUG
  119. printk("BCH error corrected for 3 bytes: address 0x%08X, data [0x%02X] --> ",
  120. (unsigned int)((u8 *)REG_SMRA0 + uaAddr[ii]), (unsigned int)(*((u8 *)REG_SMRA0 + uaAddr[ii])));
  121. #endif
  122. *((u8 *)REG_SMRA0 + uaAddr[ii]) ^= uaData[ii];
  124. #ifdef NUC970_NAND_DEBUG
  125. printk("[0x%02X]\n", *((u8 *)REG_SMRA0+uaAddr[ii]));
  126. #endif
  127. }
  128. //以下代码为纠错代码，老衲没有看明白.......!!!!!
  129. // for wrong parity code in redundancy area
  130. else
  131. {
  132. // BCH_ERR_ADDRx = [data in field] + [3 bytes] + [xx] + [parity code]
  133. //                                   |<--     padding bytes      -->|
  134. // The BCH_ERR_ADDRx for last parity code always = field size + padding size.
  135. // So, the first parity code = field size + padding size - parity code length.
  136. // For example, for BCH T12, the first parity code = 512 + 32 - 23 = 521.
  137. // That is, error byte address offset within field is
  138. uaAddr[ii] = uaAddr[ii] - (field_len + padding_len - parity_len);
  140. // smra_index point to the first parity code of first field in register SMRA0~n
  141. smra_index = (u8 *)
  142. (REG_SMRA0 + (readl(REG_SMREACTL) & 0x1ff) - // bottom of all parity code -
  143. (parity_len * total_field_num)                             // byte count of all parity code
  144. );
  146. // final address = first parity code of first field +
  147. //                 offset of fields +
  148. //                 offset within field
  150. #ifdef NUC970_NAND_DEBUG
  151. printk("BCH error corrected for parity: address 0x%08X, data [0x%02X] --> ",
  152. (unsigned int)(smra_index + (parity_len * (ucFieidIndex-1)) + uaAddr[ii]),
  153. (unsigned int)(*(smra_index + (parity_len * (ucFieidIndex-1)) + uaAddr[ii])));
  154. #endif
  155. *((u8 *)smra_index + (parity_len * (ucFieidIndex-1)) + uaAddr[ii]) ^= uaData[ii];
  157. #ifdef NUC970_NAND_DEBUG
  158. printk("[0x%02X]\n",
  159. *((u8 *)smra_index + (parity_len * (ucFieidIndex-1)) + uaAddr[ii]));
  160. #endif
  161. }
  162. }   // end of for (ii<ucErrorCnt)
  163. LEAVE();
  164. }
  166. int fmiSMCorrectData (struct mtd_info *mtd, unsigned long uDAddr )
  167. {
  168. int uStatus, ii, jj, i32FieldNum=0;
  169. volatile int uErrorCnt = 0;
  171. ENTER();
  173. if ( readl ( REG_SMISR ) & 0x4 ) //只读，表明ECC校验值是否出错
  174. {
  175. if ( ( readl(REG_SMCSR) & 0x7C0000) == BCH_T24 ) //BCH_T24的页为1024字节,其他的为512字节
  176. i32FieldNum = mtd->writesize / 1024;    // Block=1024 for BCH
  177. else
  178. i32FieldNum = mtd->writesize / 512;
  180. //每一页的大小，我使用的是每页=2K，而计算ecc是每512字节计算一个oob，所以这里有四个
  181. if ( i32FieldNum < 4 ) //每一页会计算ECC校
  182. i32FieldNum  = 1;
  183. else
  184. i32FieldNum /= 4;
  186. for ( jj=0; jj<i32FieldNum; jj++ )
  187. {
  188.         	//REG_SMECC_ST0+jj*4: 该寄存器每8个bit表示一个ECC状态，Bit0~1是否有ECC错误，Bit2~7 表示ECC错误的个数是多少？
  189. uStatus = readl ( REG_SMECC_ST0+jj*4 );
  190. if ( !uStatus )
  191. continue;
  193. for ( ii=1; ii<5; ii++ )
  194. {
  195. if ( !(uStatus & 0x03) ) { // No error   Bit0~1
  196. uStatus >>= 8;
  197. continue;
  198. } else if ( (uStatus & 0x03)==0x01 ) { // Correctable error  错误，数据纠正
  199. uErrorCnt = (uStatus >> 2) & 0x1F;
  200. #ifdef NUC970_NAND_DEBUG
  201. printk("Field (%d, %d) have %d error!!\n", jj, ii, uErrorCnt);
  202. #endif
  203. fmiSM_CorrectData_BCH(jj*4+ii, uErrorCnt, (char*)uDAddr);
  204. break;
  205. } else // uncorrectable error or ECC error
  206. {
  207. #ifdef NUC970_NAND_DEBUG
  208. printk("SM uncorrectable error is encountered, 0x%4x !!\n", uStatus);
  209. #endif
  210. LEAVE();
  211. return -1;
  212. }
  213. uStatus >>= 8;
  214. }
  215. } //jj
  216. }
  217. LEAVE();
  218. return uErrorCnt;
  219. }

使能硬件ECC：

  1. void nuc970_nand_enable_hwecc(struct mtd_info *mtd, int mode)
  2. {
  3. ENTER();
  4. #ifdef NUC970_NAND_DEBUG
  5. {
  6. char * ptr=REG_SMRA0;
  7. int i=0;
  8. if( mode == NAND_ECC_READ )
  9. printk("[R]=\n");
  10. else
  11. printk("[W]=\n");
  13. for(i=0; i<mtd->oobsize; i++)
  14. {
  15. printk("%X ",  *(ptr+i) );
  16. if ( i % 32 == 31)
  17. printk("\n");
  18. }
  19. printk("\n");
  20. }
  21. #endif
  22. LEAVE();
  23. }

DMA使能、禁止：

  1. static void nuc970_nand_dmac_init( void )
  2. {
  3. // DMAC enable
  4. writel( readl(REG_NAND_DMACCSR) | 0x3, REG_NAND_DMACCSR);
  5. writel( readl(REG_NAND_DMACCSR) & (~0x2), REG_NAND_DMACCSR);
  7. // Clear DMA finished flag
  8. writel( readl(REG_SMISR) | 0x1, REG_SMISR);
  10. // Disable Interrupt
  11. writel(readl(REG_SMIER) & ~(0x1), REG_SMIER);
  12. }
  14. /*
  15. * nuc970_nand_dmac_fini - Finalize dma controller
  16. */
  17. static void nuc970_nand_dmac_fini(void)
  18. {
  19. // Clear DMA finished flag
  20. writel(readl(REG_SMISR) | 0x1, REG_SMISR);
  21. }

读nandflash字节：

  1. static unsigned char nuc970_nand_read_byte(struct mtd_info *mtd)
  2. {
  3. unsigned char ret;
  4. struct nuc970_nand_info *nand;
  6. ENTER() ;
  8. if ( nuc970_wait_sem(mtd) < 0 )
  9. return -1;
  10. nand = container_of(mtd, struct nuc970_nand_info, mtd);
  11. ret = (unsigned char)read_data_reg(nand);
  12. nuc970_release_sem(mtd);
  14. LEAVE();
  15. return ret;
  16. }

批量读nandflash字节：

  1. static void nuc970_nand_read_buf(struct mtd_info *mtd, unsigned char *buf, int len)
  2. {
  3. int i;
  4. struct nuc970_nand_info *nand;
  5. nand = container_of(mtd, struct nuc970_nand_info, mtd);
  7. ENTER() ;
  9. if ( nuc970_wait_sem(mtd) < 0 )
  10. return;
  11. for (i = 0; i < len; i++)
  12. buf[i] = (unsigned char)read_data_reg(nand);
  13. nuc970_release_sem(mtd);
  15. LEAVE();
  16. }

批量写nandflash字节：

  1. static void nuc970_nand_write_buf(struct mtd_info *mtd, const unsigned char *buf, int len)
  2. {
  3. int i;
  4. struct nuc970_nand_info *nand;
  5. nand = container_of(mtd, struct nuc970_nand_info, mtd);
  7. ENTER() ;
  9. if ( nuc970_wait_sem(mtd) < 0 )
  10. return;
  11. for (i = 0; i < len; i++)
  12. write_data_reg(nand, buf[i]);
  13. nuc970_release_sem(mtd);
  15. LEAVE();
  16. }

DMA对nandflash的读、写操作：

  1. static inline int _nuc970_nand_dma_transfer(struct mtd_info *mtd, const u_char *addr, unsigned int len, int is_write)
  2. {
  3. struct nuc970_nand_info *nand = container_of(mtd, struct nuc970_nand_info, mtd);
  4. dma_addr_t dma_addr = (dma_addr_t)nand->pnand_phyaddr;
  6. ENTER() ;
  8. // For save, wait DMAC to ready
  9. while ( readl(REG_NAND_DMACCSR) & 0x200 );
  11. // Reinitial dmac
  12. nuc970_nand_dmac_init();
  14. // Fill dma_addr
  15. writel((unsigned long)dma_addr, REG_NAND_DMACSAR);
  17. // Enable target abort interrupt generation during DMA transfer.
  18. writel( 0x1, REG_NAND_DMACIER);
  20. // Clear Ready/Busy 0 Rising edge detect flag
  21. writel(0x400, REG_SMISR);
  23. // Set which BCH algorithm
  24. if ( nand->eBCHAlgo >= 0 ) {
  25. // Set BCH algorithm
  26. writel( (readl(REG_SMCSR) & (~0x7C0000)) | g_i32BCHAlgoIdx[nand->eBCHAlgo], REG_SMCSR);
  27. // Enable H/W ECC, ECC parity check enable bit during read page
  28. writel( readl(REG_SMCSR) | 0x00800000 | 0x80, REG_SMCSR);
  30. } else  {
  31. // Disable H/W ECC / ECC parity check enable bit during read page
  32. writel( readl(REG_SMCSR) & (~0x00800080), REG_SMCSR);
  33. }
  35. writel( nand->m_i32SMRASize , REG_SMREACTL );
  37. writel( readl(REG_SMIER) & (~0x4), REG_SMIER );
  38. writel ( 0x4, REG_SMISR );
  40. // Enable SM_CS0
  41. writel((readl(REG_SMCSR)&(~0x06000000))|0x04000000, REG_SMCSR);
  42. /* setup and start DMA using dma_addr */
  44. if ( is_write ) {
  45. register char * ptr=REG_SMRA0; //register 是提示编译器将这个变量不放在栈内，放在寄存器中进行操作
  46. // To mark this page as dirty.
  47. if ( ptr[3] == 0xFF )
  48. ptr[3] = 0;
  49. if ( ptr[2] == 0xFF )
  50. ptr[2] = 0;
  52. if ( addr )
  53. memcpy( (void*)nand->pnand_vaddr, (void*)addr, len);
  55. writel ( readl(REG_SMCSR) | 0x4, REG_SMCSR ); //DMA写使能
  56. while ( !(readl(REG_SMISR) & 0x1) ); //DMA读、写数据完成中断标识
  58. } else {
  59. // Blocking for reading
  60. // Enable DMA Read
  62. writel ( readl(REG_SMCSR) | 0x2, REG_SMCSR); //DMA读使能
  63. if ( readl(REG_SMCSR) & 0x80 ) {
  64. do {
  65. int stat=0;
  66. if ( (stat=fmiSMCorrectData ( mtd,  (unsigned long)nand->pnand_vaddr)) < 0 ) //重要，待分析！！！
  67. {
  68. mtd->ecc_stats.failed++;
  69. writel ( 0x4, REG_SMISR ); //清除ECC校验出错中断标识
  70. writel ( 0x3, REG_NAND_DMACCSR);          // reset DMAC
  71. writel ( readl(REG_SMCSR)|0x1, REG_SMCSR);    // reset SM controller
  72. break;
  73. }
  74. else if ( stat > 0 ) {
  75. //mtd->ecc_stats.corrected += stat; //Occure: MLC UBIFS mount error
  76. writel ( 0x4, REG_SMISR );
  77. }
  79. } while ( !(readl(REG_SMISR) & 0x1) || (readl(REG_SMISR) & 0x4) );
  80. } else
  81. while ( !(readl(REG_SMISR) & 0x1) );
  83. if ( addr )
  84. memcpy( (void*)addr, (void*)nand->pnand_vaddr,  len );
  85. }
  87. nuc970_nand_dmac_fini();
  88. LEAVE();
  89. return 0;
  90. }
从DMA中nandflash批量读：
  1. static void nuc970_read_buf_dma(struct mtd_info *mtd, u_char *buf, int len)
  2. {
  3. ENTER();
  5. if ( nuc970_wait_sem(mtd) < 0 )
  6. return;
  8. if ( len == mtd->writesize ) /* start transfer in DMA mode */
  9. _nuc970_nand_dma_transfer ( mtd, buf, len, 0x0);
  10. else {
  11. nuc970_nand_read_buf(mtd, buf, len);
  13. #ifdef NUC970_NAND_DEBUG
  14. {
  15. int i;
  16. printk("R OOB %d\n", len );
  17. for ( i=0; i<len; i++ )
  18. {
  19. printk("%02X ", buf[i] );
  20. if ( i%32 == 31 )   printk("\n");
  21. }
  22. printk("\n");
  23. }
  24. #endif
  25. }
  26. nuc970_release_sem(mtd);
  27. LEAVE();
  28. }
向DMA中nandflash批量写：
  1. static void nuc970_write_buf_dma(struct mtd_info *mtd, const u_char *buf, int len)
  2. {
  3. ENTER();
  5. if ( nuc970_wait_sem(mtd) < 0 )
  6. return;
  8. if ( len == mtd->writesize ) /* start transfer in DMA mode */
  9. _nuc970_nand_dma_transfer(mtd, (u_char *)buf, len, 0x1);
  10. else
  11. {
  12. #ifdef NUC970_NAND_DEBUG
  13. int i;
  14. printk("W OOB %d\n", len);
  15. for ( i=0; i<len; i++ )
  16. {
  17. printk("%02X ", buf[i] );
  18. if ( i%32 == 31 )   printk("\n");
  19. }
  20. #endif
  21. nuc970_nand_write_buf(mtd, buf, len);
  22. }
  24. nuc970_release_sem(mtd);
  26. LEAVE();
  27. }

校验nandflash是否busy状态：

  1. static int nuc970_check_rb(struct nuc970_nand_info *nand)
  2. {
  3. unsigned int val;
  5. ENTER();
  6. spin_lock(&nand->lock);
  7. val = readl(REG_SMISR) & READYBUSY;
  8. spin_unlock(&nand->lock);
  9. LEAVE();
  11. return val;
  12. }
  14. static int nuc970_nand_devready(struct mtd_info *mtd)
  15. {
  16. struct nuc970_nand_info *nand;
  17. int ready;
  19. ENTER() ;
  21. if ( nuc970_wait_sem(mtd) < 0 )
  22. return -1;
  24. nand = container_of(mtd, struct nuc970_nand_info, mtd);
  25. ready = (nuc970_check_rb(nand)) ? 1 : 0;
  26. nuc970_release_sem(mtd);
  28. LEAVE();
  29. return ready;
  30. }

命令操作接口，对应ONFI中的标准，这里特别强调下命令操作的步骤，例如读数据操作，内容如下：第一次是0x00h,第二次是0x30h，而两次命令中间，需要发送对应的你所要读取的页的地址，在发送地址截至，接下来调用读数据接口接收数据：

  1. static void nuc970_nand_command_lp(struct mtd_info *mtd, unsigned int command, int column, int page_addr)
  2. {
  3. register struct nand_chip *chip = mtd->priv;
  4. struct nuc970_nand_info *nand;
  6. ENTER() ;
  8. if ( nuc970_wait_sem(mtd) < 0 ) //获取mtd分区是否加锁？
  9. {
  10. LEAVE();
  11. return;
  12. }
  13. nand = container_of(mtd, struct nuc970_nand_info, mtd);
  15. //页地址有效 && 对应有效的命令 = 选择有效的bch算法
  16. if ( page_addr != -1 && ( command == NAND_CMD_SEQIN || command == NAND_CMD_READ0 || command == NAND_CMD_READOOB ) )
  17. nuc970_choice_bch_algo ( mtd, page_addr );
  19. if (command == NAND_CMD_READOOB) { //如何理解if语句内部???解析如下
  20. column += mtd->writesize; //oob位于每一页的后面，这里的column表示列地址（nuc970_nand_read_oob_hwecc(...)函数在
  21.         						//读取oob时，column=0），要读取出对应的oob开始地址为“页+cloumn”
  22. command = NAND_CMD_READ0;
  23. }
  25. //以下部分要理解，需看懂时序，详解《linux_nand_driver.pdf》第20页时序图
  26. write_cmd_reg(nand, command & 0xff); //启动写命令到nandflash控制器
  28. if (column != -1 || page_addr != -1) {
  29. if (column != -1) {
  30. write_addr_reg(nand, (column&0xFF) ); //列地址，即页内陆址 低8bit
  31. if ( page_addr != -1 )
  32. write_addr_reg(nand, (column >> 8) ); //列地址，即页内陆址 高8bit
  33. else
  34. write_addr_reg(nand, (column >> 8) | ENDADDR); //ENDADDR, FMI_NANDADDR的第31bit，表明本次的地址结束
  36. }
  38. if (page_addr != -1) {
  39. write_addr_reg(nand, (page_addr&0xFF) ); //页地址，具体可以定位到哪一页
  41. if ( chip->chipsize > (128 << 20) ) {
  42. write_addr_reg(nand, (page_addr >> 8)&0xFF );
  43. write_addr_reg(nand, ((page_addr >> 16)&0xFF)|ENDADDR );
  44. } else {
  45. write_addr_reg(nand, ((page_addr >> 8)&0xFF)|ENDADDR );
  46. }
  47. }
  48. }
  50. switch (command) {
  51. case NAND_CMD_ERASE1: //case语句成立，就表示当前命令执行完，直接释放锁，退出即可！
  52. case NAND_CMD_ERASE2:
  53. case NAND_CMD_CACHEDPROG:
  54. case NAND_CMD_PAGEPROG:
  55. case NAND_CMD_SEQIN:
  56. case NAND_CMD_RNDIN:
  57. case NAND_CMD_STATUS:
  58. LEAVE();
  59. nuc970_release_sem(mtd);
  60. return;
  62. case NAND_CMD_RESET: //待分析工作原理？？？
  63. if (chip->dev_ready)
  64. break;
  66. if ( chip->chip_delay )
  67. udelay(chip->chip_delay);
  69. write_cmd_reg(nand, NAND_CMD_STATUS);
  70. write_cmd_reg(nand, command);
  72. while (!nuc970_check_rb(nand)) ;
  74. LEAVE();
  75. nuc970_release_sem(mtd);
  76. return;
  78. case NAND_CMD_RNDOUT: //待分析工作原理？？？
  79. write_cmd_reg(nand, NAND_CMD_RNDOUTSTART); //启动随机读取，外面调用该nuc970_nand_command_lp(...)函数，待该函数返回会有相应的接口读取数据
  80. nuc970_release_sem(mtd);
  81. LEAVE();
  82. return;
  84. case NAND_CMD_READ0: //read0命令
  85. write_cmd_reg(nand, NAND_CMD_READSTART); //见《linux_nand_driver.pdf》第18页，内容如下：“第一次是0x00h,第二次是0x30h，而两次命令中间，需要发送对应的你所要
  86. 												//读取的页的地址...”，外面调用该nuc970_nand_command_lp(...)函数，待该函数返回会有相应的接口读取数据
  87. break;
  88. default:
  89. if (!chip->dev_ready) {
  90. if ( chip->chip_delay )
  91. udelay(chip->chip_delay);
  92. LEAVE();
  93. nuc970_release_sem(mtd);
  94. return;
  95. }
  96. }
  98. while (!nuc970_check_rb(nand)) ;
  100. nuc970_release_sem(mtd);
  101. LEAVE();
  102. }

nandflash硬件ECC写操作：

  1. static void nuc970_nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, const uint8_t *buf, int oob_required)
  2. {
  3. uint8_t *ecc_calc = chip->buffers->ecccalc;
  4. uint32_t hweccbytes=chip->ecc.layout->eccbytes;
  5. register char * ptr=REG_SMRA0;
  7. ENTER();
  9. if ( nuc970_wait_sem(mtd) < 0 )
  10. {
  11. LEAVE();
  12. return ;
  13. }
  15. memset ( (void*)ptr, 0xFF, mtd->oobsize );
  16. memcpy ( (void*)ptr, (void*)chip->oob_poi,  mtd->oobsize - chip->ecc.total );
  18. _nuc970_nand_dma_transfer( mtd, buf, mtd->writesize , 0x1);
  20. // Copy parity code in SMRA to calc
  21. memcpy ( (void*)ecc_calc,  (void*)( REG_SMRA0 + ( mtd->oobsize - chip->ecc.total ) ), chip->ecc.total );
  23. // Copy parity code in calc to oob_poi
  24. memcpy ( (void*)(chip->oob_poi+hweccbytes), (void*)ecc_calc, chip->ecc.total);
  26. nuc970_release_sem(mtd);
  28. LEAVE();
  29. }

硬件ecc，先读取oob，确定ecc是否出错，纠错正常才读取数据：

  1. static int nuc970_nand_read_page_hwecc_oob_first(struct mtd_info *mtd, struct nand_chip *chip, uint8_t *buf, int oob_required, int page)
  2. {
  3. int eccsize = chip->ecc.size;
  4. uint8_t *p = buf;
  5. char * ptr=REG_SMRA0;
  7. ENTER();
  9. if ( nuc970_wait_sem(mtd) < 0 )
  10. {
  11. LEAVE();
  12. return -1;
  13. }
  14. //printk("smcsr 0x%x\n", readl(REG_SMCSR));
  15. //nuc970_choice_bch_algo ( mtd, page );
  17. /* At first, read the OOB area  */
  18. nuc970_nand_command_lp(mtd, NAND_CMD_READOOB, 0, page);
  19. nuc970_nand_read_buf(mtd, chip->oob_poi, mtd->oobsize);
  21. // Second, copy OOB data to SMRA for page read
  22. memcpy ( (void*)ptr, (void*)chip->oob_poi, mtd->oobsize );
  24. // Third, read data from nand
  25. nuc970_nand_command_lp(mtd, NAND_CMD_READ0, 0, page);
  26. _nuc970_nand_dma_transfer(mtd, p, eccsize, 0x0);
  28. // Fouth, restore OOB data from SMRA
  29. memcpy ( (void*)chip->oob_poi, (void*)ptr, mtd->oobsize );
  31. nuc970_release_sem(mtd);
  33. LEAVE();
  35. return 0;
  36. }

oob（out-of-band）参数配置：

  1. static void nuc970_layout_oob_table ( struct nand_ecclayout* pNandOOBTbl, int oobsize , int eccbytes )
  2. {
  3. //ecc使用字节数
  4. pNandOOBTbl->eccbytes = eccbytes;
  6. //oob中多余的字节数 = oob总空间 - DEF_RESERVER_OOB_SIZE_FOR_MARKER - ecc占用的字节数
  7. pNandOOBTbl->oobavail = oobsize - DEF_RESERVER_OOB_SIZE_FOR_MARKER - eccbytes ;
  9. //下面我的理解是，坏块标记，至于如何使用，待分析？？？？
  10. 	pNandOOBTbl->oobfree[0].offset = DEF_RESERVER_OOB_SIZE_FOR_MARKER;  // Bad block marker size
  11. pNandOOBTbl->oobfree[0].length = oobsize - eccbytes - pNandOOBTbl->oobfree[0].offset ;
  12. }

硬件ecc读取oob，这里多说一句，oob读取流程[命令 + 地址(列地址+行地址) + 等待nandflash忙 + 开始数据读取]
a. 发送读取命令NAND_CMD_READOOB，读取oob，实际上在ONFI协议中并没有NAND_CMD_READOOB命令，在函数nuc970_nand_command_lp（...）内部进行了转换为读命令NAND_CMD_READ0，oob的偏移位置为“每一页的尾部”，所以该函数的形参中column=0;  
b. 读取数据, nuc970_nand_read_buf(...)：

  1. static int nuc970_nand_read_oob_hwecc(struct mtd_info *mtd, struct nand_chip *chip, int page)
  2. {
  3. char * ptr=REG_SMRA0;
  5. ENTER();
  7. if ( nuc970_wait_sem(mtd) < 0 )
  8. {
  9. LEAVE();
  10. return -1;
  11. }
  13. nuc970_nand_command_lp(mtd, NAND_CMD_READOOB, 0, page);
  14. //    nuc970_choice_bch_algo ( mtd, page );
  16. nuc970_nand_read_buf(mtd, &chip->oob_poi[0], mtd->oobsize);
  18. // Second, copy OOB data to SMRA for page read
  19. memcpy ( (void*)ptr, (void*)chip->oob_poi, mtd->oobsize );
  21. // Third, read data from nand
  22. nuc970_nand_command_lp(mtd, NAND_CMD_READ0, 0, page);
  23. _nuc970_nand_dma_transfer(mtd, NULL, mtd->writesize, 0x0);
  25. // Fouth, recovery OOB data for SMRA
  26. memcpy ( (void*)chip->oob_poi, (void*)ptr, mtd->oobsize );
  28. nuc970_release_sem(mtd);
  30. return 0;
  31. }

按顺序写数据到nandflash：

  1. static int nuc970_nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, uint32_t offset, int data_len,
  2. const uint8_t *buf, int oob_required, int page, int cached, int raw)
  3. {
  4. int status;
  6. if ( nuc970_wait_sem(mtd) < 0 )
  7. {
  8. LEAVE();
  9. return -1;
  10. }
  12. nuc970_nand_command_lp(mtd, NAND_CMD_SEQIN, 0x00, page);
  14. if (unlikely(raw))
  15. chip->ecc.write_page_raw(mtd, chip, buf, 0);
  16. else
  17. {
  18. if ( page >= 0 && page < (1<<(chip->phys_erase_shift+2)) / mtd->writesize ) // four blocks
  19. {
  20. // Special pattern
  21. char * ptr=REG_SMRA0;
  22. memset ( (void*)ptr, 0xFF, mtd->oobsize );
  23. ptr[3] = 0x00;
  24. ptr[2] = 0x00;
  25. ptr[1] = 0xFF;
  26. _nuc970_nand_dma_transfer( mtd, buf, mtd->writesize , 0x1 );
  27. }
  28. else
  29. {
  30. nuc970_nand_write_page_hwecc ( mtd, chip, buf, oob_required );
  31. }
  32. }
  34. /*
  35. * Cached progamming disabled for now, Not sure if its worth the
  36. * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s)
  37. */
  38. cached = 0;
  40. if (!cached || !(chip->options & NAND_CACHEPRG)) {
  41. nuc970_nand_command_lp(mtd, NAND_CMD_PAGEPROG, -1, -1);
  42. status = chip->waitfunc(mtd, chip);
  43. /*
  44. * See if operation failed and additional status checks are
  45. * available
  46. */
  47. if ((status & NAND_STATUS_FAIL) && (chip->errstat))
  48. status = chip->errstat(mtd, chip, FL_WRITING, status, page);
  50. if (status & NAND_STATUS_FAIL)
  51. {
  52. nuc970_release_sem(mtd);
  53. return -EIO;
  54. }
  55. }
  56. else {
  57. nuc970_nand_command_lp(mtd, NAND_CMD_CACHEDPROG, -1, -1);
  58. status = chip->waitfunc(mtd, chip);
  59. }
  61. #if 0 // for verify
  62. /* Send command to read back the data */
  63. nuc970_nand_command_lp(mtd, NAND_CMD_READ0, 0, page);
  65. if (nuc970_verify_buf(mtd, buf, mtd->writesize))
  66. {
  67. nuc970_release_sem(mtd);
  68. return -EIO;
  69. }
  70. #endif
  72. nuc970_release_sem(mtd);
  73. return 0;
  74. }
对底层硬件操作的函数调用分析完了，接下来正真开始驱动注册：
  1. static int nuc970_nand_probe(struct platform_device *pdev)
  2. {
  3. struct nand_chip *chip;
  4. struct nuc970_nand_info *nuc970_nand;
  5. struct mtd_info *mtd;
  6. struct pinctrl *p;
  8. int retval=0;
  9. E_PAGESIZE ePageSize;
  11. ENTER() ;
  13. nuc970_nand = devm_kzalloc(&pdev->dev, sizeof(struct nuc970_nand_info), GFP_KERNEL);
  14. if (!nuc970_nand)
  15. return -ENOMEM;
  17. //分配虚拟地址
  18. nuc970_nand->pnand_vaddr = (unsigned char *) dma_alloc_writecombine(NULL, 512*16, (dma_addr_t *)&nuc970_nand->pnand_phyaddr, GFP_KERNEL);
  19. if(nuc970_nand->pnand_vaddr == NULL){
  20. printk(KERN_ERR "nuc970_nand: failed to allocate ram for nand data.\n");
  21. return -ENOMEM;
  22. }
  24. platform_set_drvdata(pdev, nuc970_nand); //将nuc970_nand绑定为pdev的私有数据！
  26. spin_lock_init(&nuc970_nand->controller.lock);
  27. init_waitqueue_head(&nuc970_nand->controller.wq);
  29. nuc970_nand->pdev = pdev;
  31. //这里有个疑问是mtd包含chip？？？我猜mtd应该是对应上层（如nandflash_erase命令就是和MTD相关），chip是对底层硬件操作
  33. mtd = &nuc970_nand->mtd; //分区操作结构体
  34. chip = &(nuc970_nand->chip); //芯片操作结构体
  36. nuc970_nand->mtd.priv   = chip; //将chip绑定到mtd的私有成员
  37. nuc970_nand->mtd.owner  = THIS_MODULE;
  38. spin_lock_init(&nuc970_nand->lock);
  40. /*
  41. * Get Clock
  42. */
  43. nuc970_nand->fmi_clk = clk_get(NULL, "fmi_hclk");
  44. if (IS_ERR(nuc970_nand->fmi_clk)) {
  45. printk("no fmi_clk?\n");
  46. retval = -ENXIO;
  47. goto fail1;
  48. }
  50. nuc970_nand->clk = clk_get(NULL, "nand_hclk");
  51. if (IS_ERR(nuc970_nand->clk)) {
  52. printk("no nand_clk?\n");
  53. goto fail2;
  54. }
  56. clk_prepare(nuc970_nand->fmi_clk);
  57. clk_enable(nuc970_nand->fmi_clk);
  58. clk_prepare(nuc970_nand->clk);
  59. clk_enable(nuc970_nand->clk);
  61. nuc970_nand->chip.controller = &nuc970_nand->controller;
  63. //绑定chip的接口操作函数，即chip对应底层硬件的操作方式
  64. chip->cmdfunc     = nuc970_nand_command_lp; //nandflash命令操作
  65. chip->read_byte   = nuc970_nand_read_byte; //读字节
  66. chip->select_chip = nuc970_nand_select_chip; //chip片选
  67. chip->read_buf  = nuc970_read_buf_dma; //从DMA中读取nandflash数据
  68. chip->write_buf = nuc970_write_buf_dma; //通过DMA写数据到nandflash
  70. // Check NAND device NBUSY0 pin
  71. chip->dev_ready     = nuc970_nand_devready; //读nandflash控制器是否busy
  72. /* set up nand options */
  73. chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB;
  74. //chip->options     |= NAND_SKIP_BBTSCAN;
  76. nuc970_nand->reg    = 0x00;
  78. // Read OOB data first, then HW read page
  79. chip->write_page    = nuc970_nand_write_page; //页写操作
  80. chip->ecc.mode      = NAND_ECC_HW_OOB_FIRST; //？？？
  81. chip->ecc.hwctl     = nuc970_nand_enable_hwecc; //使能硬件ECC
  82. chip->ecc.calculate = nuc970_nand_calculate_ecc; //计算ECC
  83. chip->ecc.correct   = nuc970_nand_correct_data; //纠正数据
  84. chip->ecc.write_page= nuc970_nand_write_page_hwecc; //硬件ECC页写操作
  85. chip->ecc.read_page = nuc970_nand_read_page_hwecc_oob_first; //读页数据前先读取oob（out of bound）
  86. chip->ecc.read_oob  = nuc970_nand_read_oob_hwecc; //读取数据
  87. chip->ecc.layout    = &nuc970_nand_oob;
  89. //配置gpio管脚为nandflash功能
  90. #if defined (CONFIG_NUC970_NAND_PC)
  91. p = devm_pinctrl_get_select(&pdev->dev, "nand-PC");
  93. #elif defined (CONFIG_NUC970_NAND_PI)
  94. p = devm_pinctrl_get_select(&pdev->dev, "nand-PI");
  95. #endif
  96. if (IS_ERR(p))
  97. {
  98. dev_err(&pdev->dev, "unable to reserve pin\n");
  99. retval = PTR_ERR(p);
  100. }
  101. nuc970_nand_initialize( );
  103. nuc970_nand->m_i32MyShowTime = 0;
  105. /* first scan to find the device and get the page size */
  106. if (nand_scan_ident(&(nuc970_nand->mtd), 1, NULL)) {
  107. retval = -ENXIO;
  108. goto fail3;
  109. }
  111. //Set PSize bits of SMCSR register to select NAND card page size
  112. switch (mtd->writesize) { //每一页的大小，我使用的是2K，而计算ecc是每512字节计算一个oob，所以这里有四个
  113. case 2048:
  114. writel( (readl(REG_SMCSR)&(~0x30000)) + 0x10000, REG_SMCSR);
  115. ePageSize = ePageSize_2048;
  116. break;
  118. case 4096:
  119. writel( (readl(REG_SMCSR)&(~0x30000)) + 0x20000, REG_SMCSR);
  120. ePageSize = ePageSize_4096;
  121. break;
  123. case 8192:
  124. writel( (readl(REG_SMCSR)&(~0x30000)) + 0x30000, REG_SMCSR);
  125. ePageSize = ePageSize_8192;
  126. break;
  128. /* Not support now. */
  129. case 512:
  130. //writel( (readl(REG_SMCSR)&(~0x30000)) + 0, REG_SMCSR);
  131. //ePageSize = ePageSize_512;
  132. //break;
  134. default:
  135. printk("NUC970 NAND CONTROLLER IS NOT SUPPORT THE PAGE SIZE. (%d, %d)\n", mtd->writesize, mtd->oobsize );
  136. goto fail3;
  137. }
  138. nuc970_nand->m_ePageSize = ePageSize;
  139. {
  140. // System area
  141. int i32eBCHAlgo = 0;
  142. switch(ePageSize) {
  143. case 0:
  144. case 1: i32eBCHAlgo = eBCH_T4;  break;
  145. case 2: i32eBCHAlgo = eBCH_T8;  break;
  146. case 3: i32eBCHAlgo = eBCH_T12; break;
  147. default:
  148. break;
  149. }
  150. nuc970_nand_SYSTEM_oob.m_BCHAlgoidx = i32eBCHAlgo;
  151. nuc970_nand_SYSTEM_oob.m_SMRASize   = g_SYSAREA_NAND_EXTRA_SIZE[ePageSize];
  152. nuc970_layout_oob_table ( (struct nand_ecclayout*)&nuc970_nand_SYSTEM_oob, nuc970_nand_SYSTEM_oob.m_SMRASize, g_i32ParityNum[ePageSize][i32eBCHAlgo] );
  153. printk("SYSTEM: USE %s HWECC algorithm(SMRA size: %d, Parity number:%d bytes)\n",
  154. g_pcBCHAlgoIdx[i32eBCHAlgo],nuc970_nand_SYSTEM_oob.m_SMRASize,g_i32ParityNum[ePageSize][i32eBCHAlgo] );
  156. //chp   i32eBCHAlgo = nuc970_hwecc_choice_bch_algorithm ( ePageSize, mtd->oobsize, 0 );
  157. i32eBCHAlgo = nuc970_nand_SYSTEM_oob.m_BCHAlgoidx;
  158. nuc970_nand_EXECUTE_oob.m_BCHAlgoidx = i32eBCHAlgo;
  160. if ( ePageSize==3 && mtd->oobsize >= g_SYSAREA_NAND_EXTRA_SIZE[ePageSize] ) // 8K, oob >= 376Byte
  161. {
  162. nuc970_nand_EXECUTE_oob.m_SMRASize  = g_SYSAREA_NAND_EXTRA_SIZE[ePageSize];
  163. mtd->oobsize                = nuc970_nand_EXECUTE_oob.m_SMRASize;
  164. }
  165. else if ( ePageSize==1 && mtd->oobsize >= g_SYSAREA_NAND_EXTRA_SIZE[ePageSize] ) // 2K, oob >= 64Byte
  166. {
  167. nuc970_nand_EXECUTE_oob.m_SMRASize  = g_SYSAREA_NAND_EXTRA_SIZE[ePageSize];
  168. mtd->oobsize                = nuc970_nand_EXECUTE_oob.m_SMRASize;
  169. }
  170. else
  171. nuc970_nand_EXECUTE_oob.m_SMRASize  = mtd->oobsize;
  173. if ( i32eBCHAlgo >= 0 ) {
  174. nuc970_layout_oob_table ( (struct nand_ecclayout*)&nuc970_nand_EXECUTE_oob, nuc970_nand_EXECUTE_oob.m_SMRASize, g_i32ParityNum[ePageSize][i32eBCHAlgo] );
  175. printk("EXECUTE: USE %s HWECC algorithm(SMRA size: %d, Parity number:%d bytes)\n",
  176. g_pcBCHAlgoIdx[i32eBCHAlgo], nuc970_nand_EXECUTE_oob.m_SMRASize, g_i32ParityNum[ePageSize][i32eBCHAlgo] );
  177. }
  178. }
  180. #ifndef CONFIG_MTD_CMDLINE_PARTS
  181. nuc970_nand->parts = (struct mtd_partition*)partitions;
  182. nuc970_nand->nr_parts = ARRAY_SIZE(partitions);
  183. #endif
  185. nuc970_nand->m_i32SMRASize  = mtd->oobsize;
  186. //chp    nuc970_nand->eBCHAlgo = nuc970_hwecc_choice_bch_algorithm ( ePageSize,   mtd->oobsize,  0 );
  187. nuc970_nand->eBCHAlgo = nuc970_nand_SYSTEM_oob.m_BCHAlgoidx;
  188. if ( nuc970_nand->eBCHAlgo < 0 ) {
  189. nuc970_layout_oob_table ( &nuc970_nand_oob, mtd->oobsize, 0 );
  190. chip->ecc.bytes = 0;
  191. chip->ecc.size  = mtd->writesize;
  192. printk("Choice BCH algorithm: No match.\n");
  193. } else {
  194. nuc970_layout_oob_table ( &nuc970_nand_oob, mtd->oobsize, g_i32ParityNum[ePageSize][nuc970_nand->eBCHAlgo] );
  195. chip->ecc.bytes = nuc970_nand_oob.eccbytes;
  196. chip->ecc.size  = mtd->writesize;
  197. printk("USE %s HWECC algorithm(Parity number:%d bytes)\n", g_pcBCHAlgoIdx[nuc970_nand->eBCHAlgo],  g_i32ParityNum[ePageSize][nuc970_nand->eBCHAlgo] );
  198. }
  200. /* set BCH Tn */
  201. switch (nuc970_nand->eBCHAlgo)
  202. {
  203. case eBCH_T4:
  204. chip->ecc.strength  = 4;
  205. break;
  206. case eBCH_T8:
  207. chip->ecc.strength  = 8;
  208. break;
  209. case eBCH_T12:
  210. chip->ecc.strength  = 12;
  211. break;
  212. case eBCH_T15:
  213. chip->ecc.strength  = 15;
  214. break;
  215. case eBCH_T24:
  216. chip->ecc.strength  = 24;
  217. break;
  218. default:
  219. ;
  220. }
  222. /* add mtd-id. The string should same as uboot definition */
  223. mtd->name = "nand0";
  225. /* second phase scan */
  226. if ( nand_scan_tail( &(nuc970_nand->mtd) ) ) {
  227. retval = -ENXIO;
  228. goto fail3;
  229. }
  231. if ( nuc970_nand->eBCHAlgo >= 0 )
  232. nuc970_nand_hwecc_init (&(nuc970_nand->mtd));
  233. else
  234. nuc970_nand_hwecc_fini (&(nuc970_nand->mtd));
  236. dump_chip_info( chip );
  238. /* First look for RedBoot table or partitions on the command
  239. * line, these take precedence over device tree information */
  240. mtd_device_parse_register(&(nuc970_nand->mtd), NULL, NULL, nuc970_nand->parts, nuc970_nand->nr_parts);
  242. LEAVE();
  244. dump_regs(__LINE__);
  246. printk("fmi-sm: registered successfully! mtdid=%s\n", mtd->name);
  247. return retval;
  248. fail3:
  249. fail2:
  250. fail1:  kfree(nuc970_nand);
  251. return retval;
  252. }

probe(...)探测函数内部已基本有注释，现在主要分析几个重要的的函数，如下，

nandflash扫描识别，包括厂商ID,芯片ID,是否符合ONFI标准....

  1. if (nand_scan_ident(&(nuc970_nand->mtd), 1, NULL)) {
  2. retval = -ENXIO;
  3. goto fail3;
  4. }
  1. int nand_scan_ident(struct mtd_info *mtd, int maxchips,
  2. struct nand_flash_dev *table)
  3. {
  4. int i, busw, nand_maf_id, nand_dev_id;
  5. struct nand_chip *chip = mtd->priv;
  6. struct nand_flash_dev *type;
  8. /* Get buswidth to select the correct functions */
  9. 	busw = chip->options & NAND_BUSWIDTH_16;
  10. /* Set the default functions */
  11. 	nand_set_defaults(chip, busw); //设置默认函数接口，包括坏块扫描函数
  13. /* Read the flash type */
  14. //读取flash的类型，包括厂商ID，设备ID
  15. 	type = nand_get_flash_type(mtd, chip, busw,
  16. 				&nand_maf_id, &nand_dev_id, table);
  18. if (IS_ERR(type)) {
  19. if (!(chip->options & NAND_SCAN_SILENT_NODEV))
  20. 			pr_warn("No NAND device found\n");
  21. 		chip->select_chip(mtd, -1);
  22. return PTR_ERR(type);
  23. 	}
  25. 	chip->select_chip(mtd, -1);
  27. /* Check for a chip array */
  28. for (i = 1; i < maxchips; i++) {
  29. //片选使能
  30. 		chip->select_chip(mtd, i);
  32. //复位nandflash
  33. /* See comment in nand_get_flash_type for reset */
  34. 		chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
  36. //发送读ID命令
  37. /* Send the command for reading device ID */
  38. 		chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
  40. //读取厂商ID和设备ID
  41. /* Read manufacturer and device IDs */
  42. if (nand_maf_id != chip->read_byte(mtd) ||
  43. nand_dev_id != chip->read_byte(mtd)) {
  44. 			chip->select_chip(mtd, -1); //片选禁止
  45. break;
  46. 		}
  47. 		chip->select_chip(mtd, -1);
  48. 	}
  49. if (i > 1)
  50. 		pr_info("%d NAND chips detected\n", i);
  52. //保存当前片选的nandflash
  53. /* Store the number of chips and calc total size for mtd */
  54. 	chip->numchips = i;
  55. 	mtd->size = i * chip->chipsize;
  57. return 0;
  58. }

nandflash默认接口设置，函数形参 @busw决定了外围总线宽度是8位还是16位，我这里是8位，默认设置的函数我们在probe()探测函数内部绑定，这里主要分析坏块扫描接口绑定：

  1. static void nand_set_defaults(struct nand_chip *chip, int busw)
  2. {
  3. /* check for proper chip_delay setup, set 20us if not */
  4. if (!chip->chip_delay)
  5. 		chip->chip_delay = 20;
  7. /* check, if a user supplied command function given */
  8. if (chip->cmdfunc == NULL)
  9. 		chip->cmdfunc = nand_command;
  11. /* check, if a user supplied wait function given */
  12. if (chip->waitfunc == NULL)
  13. 		chip->waitfunc = nand_wait;
  15. if (!chip->select_chip)
  16. 		chip->select_chip = nand_select_chip;
  18. /* If called twice, pointers that depend on busw may need to be reset */
  19. if (!chip->read_byte || chip->read_byte == nand_read_byte)
  20. 		chip->read_byte = busw ? nand_read_byte16 : nand_read_byte;
  21. if (!chip->read_word)
  22. 		chip->read_word = nand_read_word;
  23. if (!chip->block_bad)
  24. 		chip->block_bad = nand_block_bad;
  25. if (!chip->block_markbad)
  26. 		chip->block_markbad = nand_default_block_markbad;
  27. if (!chip->write_buf || chip->write_buf == nand_write_buf)
  28. 		chip->write_buf = busw ? nand_write_buf16 : nand_write_buf;
  29. if (!chip->read_buf || chip->read_buf == nand_read_buf)
  30. 		chip->read_buf = busw ? nand_read_buf16 : nand_read_buf;
  31. if (!chip->scan_bbt)
  32. 		chip->scan_bbt = nand_default_bbt; //绑定坏块扫描函数
  34. if (!chip->controller) {
  35. 		chip->controller = &chip->hwcontrol;
  36. 		spin_lock_init(&chip->controller->lock);
  37. 		init_waitqueue_head(&chip->controller->wq);
  38. 	}
  40. }

先看下坏块表的结构体：

  1. struct nand_bbt_descr {
  2. int options; //选项，具体见赋值
  3. int pages[NAND_MAX_CHIPS]; //nandflash芯片个数，我们这里为1块
  4. int offs; //坏块标记存放在oob区域，offs是相对oob的偏移位置
  5. int veroffs;
  6. uint8_t version[NAND_MAX_CHIPS];
  7. int len; //坏块标记占用的字节数
  8. int maxblocks;
  9. int reserved_block_code;
  10. uint8_t *pattern; //如果坏块标记的是0xff，则说明这个block是好的
  11. };

nandflash默认坏块表：

  1. int nand_default_bbt(struct mtd_info *mtd)
  2. {
  3. struct nand_chip *this = mtd->priv;
  5. /* Is a flash based bad block table requested? */
  6. if (this->bbt_options & NAND_BBT_USE_FLASH) {
  7. /* Use the default pattern descriptors */
  8. if (!this->bbt_td) {
  9. if (this->bbt_options & NAND_BBT_NO_OOB) {
  10. this->bbt_td = &bbt_main_no_oob_descr;
  11. this->bbt_md = &bbt_mirror_no_oob_descr;
  12. 			} else {
  13. this->bbt_td = &bbt_main_descr;
  14. this->bbt_md = &bbt_mirror_descr;
  15. 			}
  16. 		}
  17. 	} else {
  18. this->bbt_td = NULL;
  19. this->bbt_md = NULL;
  20. 	}
  22. if (!this->badblock_pattern)
  23. 		nand_create_badblock_pattern(this); //建立一个bad block坏块表模式
  25. return nand_scan_bbt(mtd, this->badblock_pattern); //扫描坏块表
  26. }

建立一个坏块表模版：

  1. static int nand_create_badblock_pattern(struct nand_chip *this)
  2. {
  3. struct nand_bbt_descr *bd;
  4. if (this->badblock_pattern) {
  5. 		pr_warn("Bad block pattern already allocated; not replacing\n");
  6. return -EINVAL;
  7. 	}
  8. 	bd = kzalloc(sizeof(*bd), GFP_KERNEL);
  9. if (!bd)
  10. return -ENOMEM;
  11. 	bd->options = this->bbt_options & BADBLOCK_SCAN_MASK; //坏块扫描
  12. 	bd->offs = this->badblockpos; //坏块标记存放在每个page的oob里面
  13. 	bd->len = (this->options & NAND_BUSWIDTH_16) ? 2 : 1; //根据总线的宽度决定坏块标记在oob的字节数
  14. 	bd->pattern = scan_ff_pattern; //如果坏块标记的是0xff，则说明这个block是好的
  15. 	bd->options |= NAND_BBT_DYNAMICSTRUCT; //表明bbt是动态结构体
  16. this->badblock_pattern = bd;
  17. return 0;
  18. }

扫描坏块，以下函数说明已经很详细了，就是如果flash已经存在bbt了，就读取到内存中，如果没有，就扫描全部flash芯片建立bbt；那最初的bbt从何而来？2种来源，一种是bootloader启动的时候，创建了bbt并保存到flash中；另外就是kernel第一次启动的时候如果没有找到合法的bbt就扫描flash并建立bbt

  1. int nand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd)
  2. {
  3. struct nand_chip *this = mtd->priv;
  4. int len, res = 0;
  5. uint8_t *buf;
  6. struct nand_bbt_descr *td = this->bbt_td;
  7. struct nand_bbt_descr *md = this->bbt_md;
  9. 	len = mtd->size >> (this->bbt_erase_shift + 2);
  10. /*
  11. 	* Allocate memory (2bit per block) and clear the memory bad block
  12. 	* table.
  13. 	*/
  14. this->bbt = kzalloc(len, GFP_KERNEL);
  15. if (!this->bbt)
  16. return -ENOMEM;
  18. /*
  19. 	* If no primary table decriptor is given, scan the device to build a
  20. 	* memory based bad block table.
  21. 	*/
  22. if (!td) {
  23. if ((res = nand_memory_bbt(mtd, bd))) {
  24. 			pr_err("nand_bbt: can't scan flash and build the RAM-based BBT\n");
  25. 			kfree(this->bbt);
  26. this->bbt = NULL;
  27. 		}
  28. return res;
  29. 	}
  30. 	verify_bbt_descr(mtd, td);
  31. 	verify_bbt_descr(mtd, md);
  33. /* Allocate a temporary buffer for one eraseblock incl. oob */
  34. 	len = (1 << this->bbt_erase_shift);
  35. 	len += (len >> this->page_shift) * mtd->oobsize;
  36. 	buf = vmalloc(len);
  37. if (!buf) {
  38. 		kfree(this->bbt);
  39. this->bbt = NULL;
  40. return -ENOMEM;
  41. 	}
  43. /* Is the bbt at a given page? */
  44. if (td->options & NAND_BBT_ABSPAGE) { //
  45. 		read_abs_bbts(mtd, buf, td, md);
  46. 	} else {
  47. /* Search the bad block table using a pattern in oob */
  48. 		search_read_bbts(mtd, buf, td, md);
  49. 	}
  51. 	res = check_create(mtd, buf, bd);
  53. /* Prevent the bbt regions from erasing / writing */
  54. 	mark_bbt_region(mtd, td);
  55. if (md)
  56. 		mark_bbt_region(mtd, md);
  58. 	vfree(buf);
  59. return res;
  60. }

搜索坏块表：

  1. static void search_read_bbts(struct mtd_info *mtd, uint8_t *buf,
  2. struct nand_bbt_descr *td,
  3. struct nand_bbt_descr *md)
  4. {
  5. /* Search the primary table */
  6. 	search_bbt(mtd, buf, td); //扫描主要的表
  8. /* Search the mirror table */
  9. if (md)
  10. 		search_bbt(mtd, buf, md); //扫描镜像表
  11. }
  1. static int search_bbt(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td)
  2. {
  3. struct nand_chip *this = mtd->priv;
  4. int i, chips;
  5. int bits, startblock, block, dir;
  6. int scanlen = mtd->writesize + mtd->oobsize; //数据区+oob区
  7. int bbtblocks;
  8. int blocktopage = this->bbt_erase_shift - this->page_shift;
  10. /* Search direction top -> down? */
  11. if (td->options & NAND_BBT_LASTBLOCK) {
  12. 		startblock = (mtd->size >> this->bbt_erase_shift) - 1;
  13. 		dir = -1;
  14. 	} else {
  15. 		startblock = 0;
  16. 		dir = 1;
  17. 	}
  19. /* Do we have a bbt per chip? */
  20. if (td->options & NAND_BBT_PERCHIP) {
  21. 		chips = this->numchips;
  22. 		bbtblocks = this->chipsize >> this->bbt_erase_shift;
  23. 		startblock &= bbtblocks - 1;
  24. 	} else {
  25. 		chips = 1;
  26. 		bbtblocks = mtd->size >> this->bbt_erase_shift;
  27. 	}
  29. /* Number of bits for each erase block in the bbt */
  30. 	bits = td->options & NAND_BBT_NRBITS_MSK;
  32. for (i = 0; i < chips; i++) {
  33. /* Reset version information */
  34. 		td->version[i] = 0;
  35. 		td->pages[i] = -1;
  36. /* Scan the maximum number of blocks */
  37. for (block = 0; block < td->maxblocks; block++) { //遍历chip的全部blocks
  39. int actblock = startblock + dir * block; //计算哪个block
  40. loff_t offs = (loff_t)actblock << this->bbt_erase_shift; //计算block在nandflash中的的偏移
  42. /* Read first page */
  43. 			scan_read(mtd, buf, offs, mtd->writesize, td);
  44. if (!check_pattern(buf, scanlen, mtd->writesize, td)) { //校验坏块
  45. 				td->pages[i] = actblock << blocktopage; //计算实际有坏块的页
  46. if (td->options & NAND_BBT_VERSION) {
  47. 					offs = bbt_get_ver_offs(mtd, td);
  48. 					td->version[i] = buf[offs];
  49. 				}
  50. break;
  51. 			}
  52. 		}
  53. 		startblock += this->chipsize >> this->bbt_erase_shift;
  54. 	}
  55. /* Check, if we found a bbt for each requested chip */
  56. for (i = 0; i < chips; i++) {
  57. if (td->pages[i] == -1)
  58. 			pr_warn("Bad block table not found for chip %d\n", i);
  59. else
  60. 			pr_info("Bad block table found at page %d, version "
  61. 				"0x%02X\n", td->pages[i], td->version[i]);
  62. 	}
  63. return 0;
  64. }

如果出现坏块，内核在启动时会打印如下的信息：

  1. Bad block table found at page 65472, version 0x01
  2. Bad block table found at page 65408, version 0x01

关于nandflash坏块表，后续专门写一篇文章，待续......

再重新回到nand_scan_ident(...)函数中的nand_get_flash_type(...)获取厂商ID、设备ID：

  1. static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
  2. 						struct nand_chip *chip,
  3. 						int busw,
  4. 						int *maf_id, int *dev_id,
  5. 						struct nand_flash_dev *type)
  6. {
  7. int i, maf_idx;
  8. 	u8 id_data[8];
  10. /* Select the device */
  11. 	chip->select_chip(mtd, 0);
  13. /*
  14. 	* Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx)
  15. 	* after power-up.
  16. 	*/
  17. 	chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
  19. /* Send the command for reading device ID */
  20. 	chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
  22. /* Read manufacturer and device IDs */
  23. 	*maf_id = chip->read_byte(mtd);
  24. 	*dev_id = chip->read_byte(mtd);
  26. /*
  27. 	* Try again to make sure, as some systems the bus-hold or other
  28. 	* interface concerns can cause random data which looks like a
  29. 	* possibly credible NAND flash to appear. If the two results do
  30. 	* not match, ignore the device completely.
  31. 	*/
  33. 	chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
  35. /* Read entire ID string */
  36. for (i = 0; i < 8; i++)
  37. 		id_data[i] = chip->read_byte(mtd);
  39. if (id_data[0] != *maf_id || id_data[1] != *dev_id) {
  40. 		pr_info("%s: second ID read did not match "
  41. "%02x,%02x against %02x,%02x\n", __func__,
  42. 			*maf_id, *dev_id, id_data[0], id_data[1]);
  43. return ERR_PTR(-ENODEV);
  44. 	}
  46. if (!type)
  47. 		type = nand_flash_ids;
  49. for (; type->name != NULL; type++) {
  50. if (is_full_id_nand(type)) {
  51. if (find_full_id_nand(mtd, chip, type, id_data, &busw))
  52. goto ident_done;
  53. 		} else if (*dev_id == type->dev_id) {
  54. break;
  55. 		}
  56. 	}
  58. 	chip->onfi_version = 0;
  59. if (!type->name || !type->pagesize) {
  60. //探测是否是ONFI标准，如果是就读取chip的大小、页擦除大小、页尺寸....
  61. /* Check is chip is ONFI compliant */
  62. if (nand_flash_detect_onfi(mtd, chip, &busw))
  63. goto ident_done;
  64. 	}
  66. if (!type->name)
  67. return ERR_PTR(-ENODEV);
  69. if (!mtd->name)
  70. 		mtd->name = type->name;
  72. 	chip->chipsize = (uint64_t)type->chipsize << 20;
  74. if (!type->pagesize && chip->init_size) {
  75. /* Set the pagesize, oobsize, erasesize by the driver */
  76. 		busw = chip->init_size(mtd, chip, id_data);
  77. 	} else if (!type->pagesize) {
  78. /* Decode parameters from extended ID */
  79. 		nand_decode_ext_id(mtd, chip, id_data, &busw);
  80. 	} else {
  81. 		nand_decode_id(mtd, chip, type, id_data, &busw);
  82. 	}
  83. /* Get chip options */
  84. 	chip->options |= type->options;
  86. /*
  87. 	* Check if chip is not a Samsung device. Do not clear the
  88. 	* options for chips which do not have an extended id.
  89. 	*/
  90. if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize)
  91. 		chip->options &= ~NAND_SAMSUNG_LP_OPTIONS;
  92. ident_done:
  94. /* Try to identify manufacturer */
  95. for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_idx++) {
  96. if (nand_manuf_ids[maf_idx].id == *maf_id)
  97. break;
  98. 	}
  100. if (chip->options & NAND_BUSWIDTH_AUTO) {
  101. 		WARN_ON(chip->options & NAND_BUSWIDTH_16);
  102. 		chip->options |= busw;
  103. 		nand_set_defaults(chip, busw);
  104. 	} else if (busw != (chip->options & NAND_BUSWIDTH_16)) {
  105. /*
  106. 		* Check, if buswidth is correct. Hardware drivers should set
  107. 		* chip correct!
  108. 		*/
  109. 		pr_info("NAND device: Manufacturer ID:"
  110. " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id,
  111. 			*dev_id, nand_manuf_ids[maf_idx].name, mtd->name);
  112. 		pr_warn("NAND bus width %d instead %d bit\n",
  113. 			(chip->options & NAND_BUSWIDTH_16) ? 16 : 8,
  114. 			busw ? 16 : 8);
  115. return ERR_PTR(-EINVAL);
  116. 	}
  118. 	nand_decode_bbm_options(mtd, chip, id_data);
  120. /* Calculate the address shift from the page size */
  121. 	chip->page_shift = ffs(mtd->writesize) - 1;
  122. /* Convert chipsize to number of pages per chip -1 */
  123. 	chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
  125. 	chip->bbt_erase_shift = chip->phys_erase_shift =
  126. 		ffs(mtd->erasesize) - 1;
  127. if (chip->chipsize & 0xffffffff)
  128. 		chip->chip_shift = ffs((unsigned)chip->chipsize) - 1;
  129. else {
  130. 		chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32));
  131. 		chip->chip_shift += 32 - 1;
  132. 	}
  134. 	chip->badblockbits = 8;
  135. 	chip->erase_cmd = single_erase_cmd;
  137. /* Do not replace user supplied command function! */
  138. if (mtd->writesize > 512 && chip->cmdfunc == nand_command)
  139. 		chip->cmdfunc = nand_command_lp;
  141. 	pr_info("NAND device: Manufacturer ID: 0x%02x, Chip ID: 0x%02x (%s %s),"
  142. " %dMiB, page size: %d, OOB size: %d\n",
  143. 		*maf_id, *dev_id, nand_manuf_ids[maf_idx].name,
  144. 		chip->onfi_version ? chip->onfi_params.model : type->name,
  145. 		(int)(chip->chipsize >> 20), mtd->writesize, mtd->oobsize);
  147. return type;
  148. }

输出的调试信息为：

NAND device: Manufacturer ID: 0x01, Chip ID: 0xf1 (AMD/Spansion S34ML01G2), 128MiB, page size: 2048, OOB size: 64S

nuc970_probe(...)-->nand_scan_tail(...)，该函数主要完成一些未初始化的函数，并扫描整个chip的坏块：

  1. int nand_scan_tail(struct mtd_info *mtd)
  2. {
  3. int i;
  4. struct nand_chip *chip = mtd->priv;
  6. /* New bad blocks should be marked in OOB, flash-based BBT, or both */
  7. 	BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) &&
  8. 			!(chip->bbt_options & NAND_BBT_USE_FLASH));
  10. if (!(chip->options & NAND_OWN_BUFFERS))
  11. 		chip->buffers = kmalloc(sizeof(*chip->buffers), GFP_KERNEL);
  12. if (!chip->buffers)
  13. return -ENOMEM;
  15. /* Set the internal oob buffer location, just after the page data */
  16. 	chip->oob_poi = chip->buffers->databuf + mtd->writesize;
  18. /*
  19. 	* If no default placement scheme is given, select an appropriate one.
  20. 	*/
  21. if (!chip->ecc.layout && (chip->ecc.mode != NAND_ECC_SOFT_BCH)) {
  22. switch (mtd->oobsize) { //oob中的布局
  23. case 8:
  24. 			chip->ecc.layout = &nand_oob_8;
  25. break;
  26. case 16:
  27. 			chip->ecc.layout = &nand_oob_16;
  28. break;
  29. case 64:
  30. 			chip->ecc.layout = &nand_oob_64;
  31. break;
  32. case 128:
  33. 			chip->ecc.layout = &nand_oob_128;
  34. break;
  35. default:
  36. 			pr_warn("No oob scheme defined for oobsize %d\n",
  37. 				mtd->oobsize);
  38. 			BUG();
  39. 		}
  40. 	}
  42. if (!chip->write_page)
  43. 		chip->write_page = nand_write_page;
  45. /* set for ONFI nand */
  46. if (!chip->onfi_set_features)
  47. 		chip->onfi_set_features = nand_onfi_set_features;
  48. if (!chip->onfi_get_features)
  49. 		chip->onfi_get_features = nand_onfi_get_features;
  51. /*
  52. 	* Check ECC mode, default to software if 3byte/512byte hardware ECC is
  53. 	* selected and we have 256 byte pagesize fallback to software ECC
  54. 	*/
  56. switch (chip->ecc.mode) {
  57. case NAND_ECC_HW_OOB_FIRST:
  58. /* Similar to NAND_ECC_HW, but a separate read_page handle */
  59. if (!chip->ecc.calculate || !chip->ecc.correct ||
  60. !chip->ecc.hwctl) {
  61. 			pr_warn("No ECC functions supplied; "
  62. 				"hardware ECC not possible\n");
  63. 			BUG();
  64. 		}
  65. if (!chip->ecc.read_page)
  66. 			chip->ecc.read_page = nand_read_page_hwecc_oob_first;
  68. case NAND_ECC_HW:
  69. /* Use standard hwecc read page function? */
  70. if (!chip->ecc.read_page)
  71. 			chip->ecc.read_page = nand_read_page_hwecc;
  72. if (!chip->ecc.write_page)
  73. 			chip->ecc.write_page = nand_write_page_hwecc;
  74. if (!chip->ecc.read_page_raw)
  75. 			chip->ecc.read_page_raw = nand_read_page_raw;
  76. if (!chip->ecc.write_page_raw)
  77. 			chip->ecc.write_page_raw = nand_write_page_raw;
  78. if (!chip->ecc.read_oob)
  79. 			chip->ecc.read_oob = nand_read_oob_std;
  80. if (!chip->ecc.write_oob)
  81. 			chip->ecc.write_oob = nand_write_oob_std;
  82. if (!chip->ecc.read_subpage)
  83. 			chip->ecc.read_subpage = nand_read_subpage;
  84. if (!chip->ecc.write_subpage)
  85. 			chip->ecc.write_subpage = nand_write_subpage_hwecc;
  87. case NAND_ECC_HW_SYNDROME:
  88. if ((!chip->ecc.calculate || !chip->ecc.correct ||
  89. !chip->ecc.hwctl) &&
  90. (!chip->ecc.read_page ||
  91. chip->ecc.read_page == nand_read_page_hwecc ||
  92. !chip->ecc.write_page ||
  93. chip->ecc.write_page == nand_write_page_hwecc)) {
  94. 			pr_warn("No ECC functions supplied; "
  95. 				"hardware ECC not possible\n");
  96. 			BUG();
  97. 		}
  98. /* Use standard syndrome read/write page function? */
  99. if (!chip->ecc.read_page)
  100. 			chip->ecc.read_page = nand_read_page_syndrome;
  101. if (!chip->ecc.write_page)
  102. 			chip->ecc.write_page = nand_write_page_syndrome;
  103. if (!chip->ecc.read_page_raw)
  104. 			chip->ecc.read_page_raw = nand_read_page_raw_syndrome;
  105. if (!chip->ecc.write_page_raw)
  106. 			chip->ecc.write_page_raw = nand_write_page_raw_syndrome;
  107. if (!chip->ecc.read_oob)
  108. 			chip->ecc.read_oob = nand_read_oob_syndrome;
  109. if (!chip->ecc.write_oob)
  110. 			chip->ecc.write_oob = nand_write_oob_syndrome;
  112. if (mtd->writesize >= chip->ecc.size) {
  113. if (!chip->ecc.strength) {
  114. 				pr_warn("Driver must set ecc.strength when using hardware ECC\n");
  115. 				BUG();
  116. 			}
  117. break;
  118. 		}
  119. 		pr_warn("%d byte HW ECC not possible on "
  120. 			"%d byte page size, fallback to SW ECC\n",
  121. 			chip->ecc.size, mtd->writesize);
  122. 		chip->ecc.mode = NAND_ECC_SOFT;
  124. case NAND_ECC_SOFT:
  125. 		chip->ecc.calculate = nand_calculate_ecc;
  126. 		chip->ecc.correct = nand_correct_data;
  127. 		chip->ecc.read_page = nand_read_page_swecc;
  128. 		chip->ecc.read_subpage = nand_read_subpage;
  129. 		chip->ecc.write_page = nand_write_page_swecc;
  130. 		chip->ecc.read_page_raw = nand_read_page_raw;
  131. 		chip->ecc.write_page_raw = nand_write_page_raw;
  132. 		chip->ecc.read_oob = nand_read_oob_std;
  133. 		chip->ecc.write_oob = nand_write_oob_std;
  134. if (!chip->ecc.size)
  135. 			chip->ecc.size = 256;
  136. 		chip->ecc.bytes = 3;
  137. 		chip->ecc.strength = 1;
  138. break;
  140. case NAND_ECC_SOFT_BCH:
  141. if (!mtd_nand_has_bch()) {
  142. 			pr_warn("CONFIG_MTD_ECC_BCH not enabled\n");
  143. 			BUG();
  144. 		}
  145. 		chip->ecc.calculate = nand_bch_calculate_ecc;
  146. 		chip->ecc.correct = nand_bch_correct_data;
  147. 		chip->ecc.read_page = nand_read_page_swecc;
  148. 		chip->ecc.read_subpage = nand_read_subpage;
  149. 		chip->ecc.write_page = nand_write_page_swecc;
  150. 		chip->ecc.read_page_raw = nand_read_page_raw;
  151. 		chip->ecc.write_page_raw = nand_write_page_raw;
  152. 		chip->ecc.read_oob = nand_read_oob_std;
  153. 		chip->ecc.write_oob = nand_write_oob_std;
  154. /*
  155. 		* Board driver should supply ecc.size and ecc.bytes values to
  156. 		* select how many bits are correctable; see nand_bch_init()
  157. 		* for details. Otherwise, default to 4 bits for large page
  158. 		* devices.
  159. 		*/
  160. if (!chip->ecc.size && (mtd->oobsize >= 64)) {
  161. 			chip->ecc.size = 512;
  162. 			chip->ecc.bytes = 7;
  163. 		}
  164. 		chip->ecc.priv = nand_bch_init(mtd,
  165. chip->ecc.size,
  166. chip->ecc.bytes,
  167. &chip->ecc.layout);
  168. if (!chip->ecc.priv) {
  169. 			pr_warn("BCH ECC initialization failed!\n");
  170. 			BUG();
  171. 		}
  172. 		chip->ecc.strength =
  173. 			chip->ecc.bytes * 8 / fls(8 * chip->ecc.size);
  174. break;
  176. case NAND_ECC_NONE:
  177. 		pr_warn("NAND_ECC_NONE selected by board driver. "
  178. 			"This is not recommended!\n");
  179. 		chip->ecc.read_page = nand_read_page_raw;
  180. 		chip->ecc.write_page = nand_write_page_raw;
  181. 		chip->ecc.read_oob = nand_read_oob_std;
  182. 		chip->ecc.read_page_raw = nand_read_page_raw;
  183. 		chip->ecc.write_page_raw = nand_write_page_raw;
  184. 		chip->ecc.write_oob = nand_write_oob_std;
  185. 		chip->ecc.size = mtd->writesize;
  186. 		chip->ecc.bytes = 0;
  187. 		chip->ecc.strength = 0;
  188. break;
  190. default:
  191. 		pr_warn("Invalid NAND_ECC_MODE %d\n", chip->ecc.mode);
  192. 		BUG();
  193. 	}
  195. /* For many systems, the standard OOB write also works for raw */
  196. if (!chip->ecc.read_oob_raw)
  197. 		chip->ecc.read_oob_raw = chip->ecc.read_oob;
  198. if (!chip->ecc.write_oob_raw)
  199. 		chip->ecc.write_oob_raw = chip->ecc.write_oob;
  201. /*
  202. 	* The number of bytes available for a client to place data into
  203. 	* the out of band area.
  204. 	*/
  205. 	chip->ecc.layout->oobavail = 0;
  206. for (i = 0; chip->ecc.layout->oobfree[i].length
  207. 			&& i < ARRAY_SIZE(chip->ecc.layout->oobfree); i++)
  208. 		chip->ecc.layout->oobavail +=
  209. 			chip->ecc.layout->oobfree[i].length;
  210. 	mtd->oobavail = chip->ecc.layout->oobavail;
  212. /*
  213. 	* Set the number of read / write steps for one page depending on ECC
  214. 	* mode.
  215. 	*/
  216. 	chip->ecc.steps = mtd->writesize / chip->ecc.size;
  217. if (chip->ecc.steps * chip->ecc.size != mtd->writesize) {
  218. 		pr_warn("Invalid ECC parameters\n");
  219. 		BUG();
  220. 	}
  221. 	chip->ecc.total = chip->ecc.steps * chip->ecc.bytes;
  223. /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */
  224. if (!(chip->options & NAND_NO_SUBPAGE_WRITE) &&
  225. !(chip->cellinfo & NAND_CI_CELLTYPE_MSK)) {
  226. switch (chip->ecc.steps) {
  227. case 2:
  228. 			mtd->subpage_sft = 1;
  229. break;
  230. case 4:
  231. case 8:
  232. case 16:
  233. 			mtd->subpage_sft = 2;
  234. break;
  235. 		}
  236. 	}
  237. 	chip->subpagesize = mtd->writesize >> mtd->subpage_sft;
  239. /* Initialize state */
  240. 	chip->state = FL_READY;
  242. /* Invalidate the pagebuffer reference */
  243. 	chip->pagebuf = -1;
  245. /* Large page NAND with SOFT_ECC should support subpage reads */
  246. if ((chip->ecc.mode == NAND_ECC_SOFT) && (chip->page_shift > 9))
  247. 		chip->options |= NAND_SUBPAGE_READ;
  249. /* Fill in remaining MTD driver data */
  250. 	mtd->type = MTD_NANDFLASH;
  251. 	mtd->flags = (chip->options & NAND_ROM) ? MTD_CAP_ROM :
  252. 						MTD_CAP_NANDFLASH;
  253. 	mtd->_erase = nand_erase;
  254. 	mtd->_point = NULL;
  255. 	mtd->_unpoint = NULL;
  256. 	mtd->_read = nand_read;
  257. 	mtd->_write = nand_write;
  258. 	mtd->_panic_write = panic_nand_write;
  259. 	mtd->_read_oob = nand_read_oob;
  260. 	mtd->_write_oob = nand_write_oob;
  261. 	mtd->_sync = nand_sync;
  262. 	mtd->_lock = NULL;
  263. 	mtd->_unlock = NULL;
  264. 	mtd->_suspend = nand_suspend;
  265. 	mtd->_resume = nand_resume;
  266. 	mtd->_block_isbad = nand_block_isbad;
  267. 	mtd->_block_markbad = nand_block_markbad;
  268. 	mtd->writebufsize = mtd->writesize;
  270. /* propagate ecc info to mtd_info */
  271. 	mtd->ecclayout = chip->ecc.layout;
  272. 	mtd->ecc_strength = chip->ecc.strength;
  273. /*
  274. 	* Initialize bitflip_threshold to its default prior scan_bbt() call.
  275. 	* scan_bbt() might invoke mtd_read(), thus bitflip_threshold must be
  276. 	* properly set.
  277. 	*/
  278. if (!mtd->bitflip_threshold)
  279. 		mtd->bitflip_threshold = mtd->ecc_strength;
  281. /* Check, if we should skip the bad block table scan */
  282. if (chip->options & NAND_SKIP_BBTSCAN)
  283. return 0;
  285. /* Build bad block table */
  286. return chip->scan_bbt(mtd);
  287. }
  288. EXPORT_SYMBOL(nand_scan_tail);
最后调用“chip->scan_bbt(mtd)”扫描坏块、并且建立坏块表，函数内部上面已经分析过，这里不在赘述！

6. 分区表创建

nandflash分区结构体定义：

  1. static struct mtd_partition partitions[] = {
  2. {
  3. .name = "u-boot",
  4. .offset = 0,
  5. .size = 2 * 1024 * 1024,
  6. .ecclayout = (struct nand_ecclayout*)&nuc970_nand_SYSTEM_oob
  7. },
  8. {
  9. .name = "Kernel",
  10. .size = 20 * 1024 * 1024,
  11. .offset = MTDPART_OFS_APPEND,
  12. .ecclayout = (struct nand_ecclayout*)&nuc970_nand_EXECUTE_oob
  13. },
  14. {
  15. .name = "user",
  16. .offset = MTDPART_OFS_APPEND,
  17. .size = MTDPART_SIZ_FULL
  18. }
  19. };

分区结构注册：

mtd_device_parse_register(&(nuc970_nand->mtd), NULL, NULL, nuc970_nand->parts, nuc970_nand->nr_parts);
  1. int mtd_device_parse_register(struct mtd_info *mtd, const char * const *types,
  2. struct mtd_part_parser_data *parser_data,
  3. const struct mtd_partition *parts,
  4. int nr_parts)
  5. {
  6. int err;
  7. struct mtd_partition *real_parts;
  9. 	err = parse_mtd_partitions(mtd, types, &real_parts, parser_data);
  10. if (err <= 0 && nr_parts && parts) {
  11. //复制parts分区到内存
  12. 		real_parts = kmemdup(parts, sizeof(*parts) * nr_parts,
  13. GFP_KERNEL);
  14. if (!real_parts)
  15. 			err = -ENOMEM;
  16. else
  17. 			err = nr_parts; //分区个数
  18. 	}
  20. if (err > 0) { //err > 0条件成立
  21. 		err = add_mtd_partitions(mtd, real_parts, err); //增加MTD分区
  22. 		kfree(real_parts);
  23. 	} else if (err == 0) {
  24. 		err = add_mtd_device(mtd); //增加MTD设备，见下面
  25. if (err == 1)
  26. 			err = -ENODEV;
  27. 	}
  29. return err;
  30. }
  1. int add_mtd_partitions(struct mtd_info *master,
  2. const struct mtd_partition *parts,
  3. int nbparts)
  4. {
  5. struct mtd_part *slave;
  6. uint64_t cur_offset = 0;
  7. int i;
  9. 	printk(KERN_NOTICE "Creating %d MTD partitions on \"%s\":\n", nbparts, master->name);
  11. for (i = 0; i < nbparts; i++) {
  12. 		slave = allocate_partition(master, parts + i, i, cur_offset); //分配一个分区，见下面
  13. if (IS_ERR(slave))
  14. return PTR_ERR(slave);
  16. 		mutex_lock(&mtd_partitions_mutex);
  17. 		list_add(&slave->list, &mtd_partitions); //将分区添加到mtd_partitions全局链表中
  18. 		mutex_unlock(&mtd_partitions_mutex);
  20. 		add_mtd_device(&slave->mtd); //将mtd添加到设备对象中，见下面
  22. 		cur_offset = slave->offset + slave->mtd.size;
  23. 	}
  25. return 0;
  26. }

动态分配一个分区allocate_partitions(...)，包括函数的对mtd操作的函数初始化：

  1. static struct mtd_part *allocate_partition(struct mtd_info *master,
  2. const struct mtd_partition *part, int partno,
  3. uint64_t cur_offset)
  4. {
  5. struct mtd_part *slave;
  6. char *name;
  8. /* allocate the partition structure */
  9. 	slave = kzalloc(sizeof(*slave), GFP_KERNEL);
  10. 	name = kstrdup(part->name, GFP_KERNEL); //分区名称
  11. if (!name || !slave) {
  12. 		printk(KERN_ERR"memory allocation error while creating partitions for \"%s\"\n",
  13. master->name);
  14. 		kfree(name);
  15. 		kfree(slave);
  16. return ERR_PTR(-ENOMEM);
  17. 	}
  19. /* set up the MTD object for this partition */
  20. 	slave->mtd.type = master->type; //flash类型，如MTD_NORFLASH
  21. 	slave->mtd.flags = master->flags & ~part->mask_flags;
  22. 	slave->mtd.size = part->size; //分区大小
  23. 	slave->mtd.writesize = master->writesize; //分区最小写单元，NOR-FLASH为1个字节，NAND-FLASH为一页
  24. 	slave->mtd.writebufsize = master->writebufsize;
  25. 	slave->mtd.oobsize = master->oobsize; //OOB大小，包括ECC检验
  26. 	slave->mtd.oobavail = master->oobavail;
  27. 	slave->mtd.subpage_sft = master->subpage_sft;
  29. 	slave->mtd.name = name; //分区名称，如内核“kernel”,文件系统“rootfs”
  30. 	slave->mtd.owner = master->owner;
  31. 	slave->mtd.backing_dev_info = master->backing_dev_info;
  33. /* NOTE:  we don't arrange MTDs as a tree; it'd be error-prone
  34. 	* to have the same data be in two different partitions.
  35. 	*/
  36. 	slave->mtd.dev.parent = master->dev.parent;
  38. 	slave->mtd._read = part_read; //分区读
  39. 	slave->mtd._write = part_write; //分区写
  41. if (master->_panic_write)
  42. 		slave->mtd._panic_write = part_panic_write; //内核恐慌(崩溃)时写操作
  44. if (master->_point && master->_unpoint) {
  45. 		slave->mtd._point = part_point;
  46. 		slave->mtd._unpoint = part_unpoint;
  47. 	}
  49. if (master->_get_unmapped_area)
  50. 		slave->mtd._get_unmapped_area = part_get_unmapped_area;
  51. if (master->_read_oob)
  52. 		slave->mtd._read_oob = part_read_oob; //读oob ecc校验
  53. if (master->_write_oob)
  54. 		slave->mtd._write_oob = part_write_oob;
  55. if (master->_read_user_prot_reg)
  56. 		slave->mtd._read_user_prot_reg = part_read_user_prot_reg;
  57. if (master->_read_fact_prot_reg)
  58. 		slave->mtd._read_fact_prot_reg = part_read_fact_prot_reg;
  59. if (master->_write_user_prot_reg)
  60. 		slave->mtd._write_user_prot_reg = part_write_user_prot_reg;
  61. if (master->_lock_user_prot_reg)
  62. 		slave->mtd._lock_user_prot_reg = part_lock_user_prot_reg;
  63. if (master->_get_user_prot_info)
  64. 		slave->mtd._get_user_prot_info = part_get_user_prot_info;
  65. if (master->_get_fact_prot_info)
  66. 		slave->mtd._get_fact_prot_info = part_get_fact_prot_info;
  67. if (master->_sync)
  68. 		slave->mtd._sync = part_sync;
  69. if (!partno && !master->dev.class && master->_suspend &&
  70. master->_resume) {
  71. 			slave->mtd._suspend = part_suspend;
  72. 			slave->mtd._resume = part_resume;
  73. 	}
  74. if (master->_writev)
  75. 		slave->mtd._writev = part_writev;
  76. if (master->_lock)
  77. 		slave->mtd._lock = part_lock;
  78. if (master->_unlock)
  79. 		slave->mtd._unlock = part_unlock;
  80. if (master->_is_locked)
  81. 		slave->mtd._is_locked = part_is_locked;
  82. if (master->_block_isbad)
  83. 		slave->mtd._block_isbad = part_block_isbad;
  84. if (master->_block_markbad)
  85. 		slave->mtd._block_markbad = part_block_markbad;
  86. 	slave->mtd._erase = part_erase; //分区擦除
  87. 	slave->master = master;
  88. 	slave->offset = part->offset;
  90. if (slave->offset == MTDPART_OFS_APPEND)
  91. 		slave->offset = cur_offset;
  92. if (slave->offset == MTDPART_OFS_NXTBLK) {
  93. 		slave->offset = cur_offset;
  94. if (mtd_mod_by_eb(cur_offset, master) != 0) {
  95. /* Round up to next erasesize */
  96. 			slave->offset = (mtd_div_by_eb(cur_offset, master) + 1) * master->erasesize;
  97. 			printk(KERN_NOTICE "Moving partition %d: "
  98. "0x%012llx -> 0x%012llx\n", partno,
  99. (unsigned long long)cur_offset, (unsigned long long)slave->offset);
  100. 		}
  101. 	}
  102. if (slave->offset == MTDPART_OFS_RETAIN) {
  103. 		slave->offset = cur_offset;
  104. if (master->size - slave->offset >= slave->mtd.size) {
  105. 			slave->mtd.size = master->size - slave->offset
  106. 							- slave->mtd.size;
  107. 		} else {
  108. 			printk(KERN_ERR "mtd partition \"%s\" doesn't have enough space: %#llx < %#llx, disabled\n",
  109. 				part->name, master->size - slave->offset,
  110. 				slave->mtd.size);
  111. /* register to preserve ordering */
  112. goto out_register;
  113. 		}
  114. 	}
  115. if (slave->mtd.size == MTDPART_SIZ_FULL)
  116. 		slave->mtd.size = master->size - slave->offset;
  117.         //注意这里内核会打印分区的地址范围
  118. 	printk(KERN_NOTICE "0x%012llx-0x%012llx : \"%s\"\n", (unsigned long long)slave->offset,
  119. 		(unsigned long long)(slave->offset + slave->mtd.size), slave->mtd.name);
  121. /* let's do some sanity checks */
  122. if (slave->offset >= master->size) {
  123. /* let's register it anyway to preserve ordering */
  124. 		slave->offset = 0;
  125. 		slave->mtd.size = 0;
  126. 		printk(KERN_ERR"mtd: partition \"%s\" is out of reach -- disabled\n",
  127. 			part->name);
  128. goto out_register;
  129. 	}
  130. if (slave->offset + slave->mtd.size > master->size) {
  131. 		slave->mtd.size = master->size - slave->offset;
  132. 		printk(KERN_WARNING"mtd: partition \"%s\" extends beyond the end of device \"%s\" -- size truncated to %#llx\n",
  133. 			part->name, master->name, (unsigned long long)slave->mtd.size);
  134. 	}
  135. if (master->numeraseregions > 1) {
  136. /* Deal with variable erase size stuff */
  137. int i, max = master->numeraseregions;
  138. 		u64 end = slave->offset + slave->mtd.size;
  139. struct mtd_erase_region_info *regions = master->eraseregions;
  141. /* Find the first erase regions which is part of this
  142. 		* partition. */
  143. for (i = 0; i < max && regions[i].offset <= slave->offset; i++)
  144. 			;
  145. /* The loop searched for the region _behind_ the first one */
  146. if (i > 0)
  147. 			i--;
  149. /* Pick biggest erasesize */
  150. for (; i < max && regions[i].offset < end; i++) {
  151. if (slave->mtd.erasesize < regions[i].erasesize) {
  152. 				slave->mtd.erasesize = regions[i].erasesize;
  153. 			}
  154. 		}
  155. 		BUG_ON(slave->mtd.erasesize == 0);
  156. 	} else {
  157. /* Single erase size */
  158. 		slave->mtd.erasesize = master->erasesize;
  159. 	}
  161. if ((slave->mtd.flags & MTD_WRITEABLE) &&
  162. mtd_mod_by_eb(slave->offset, &slave->mtd)) {
  163. /* Doesn't start on a boundary of major erase size */
  164. /* FIXME: Let it be writable if it is on a boundary of
  165. 		* _minor_ erase size though */
  166. 		slave->mtd.flags &= ~MTD_WRITEABLE;
  167. 		printk(KERN_WARNING"mtd: partition \"%s\" doesn't start on an erase block boundary -- force read-only\n",
  168. 			part->name);
  169. 	}
  170. if ((slave->mtd.flags & MTD_WRITEABLE) &&
  171. mtd_mod_by_eb(slave->mtd.size, &slave->mtd)) {
  172. 		slave->mtd.flags &= ~MTD_WRITEABLE;
  173. 		printk(KERN_WARNING"mtd: partition \"%s\" doesn't end on an erase block -- force read-only\n",
  174. 			part->name);
  175. 	}
  177. 	slave->mtd.ecclayout = master->ecclayout;
  178. 	slave->mtd.ecc_strength = master->ecc_strength;
  179. 	slave->mtd.bitflip_threshold = master->bitflip_threshold;
  181. if (master->_block_isbad) {
  182. uint64_t offs = 0;
  184. while (offs < slave->mtd.size) {
  185. if (mtd_block_isbad(master, offs + slave->offset))
  186. 				slave->mtd.ecc_stats.badblocks++;
  187. 			offs += slave->mtd.erasesize;
  188. 		}
  189. 	}
  191. out_register:
  192. return slave;
  193. }

上面函数执行完后，会输出如下报文：

  1. Creating 3 MTD partitions on "nand0":
  2. 0x000000000000-0x000000200000 : "u-boot"
  3. 0x000000200000-0x000000700000 : "kernel"
  4. 0x000000700000-0x000008000000 : "rootfs"

增加mtd设备：

  1. int add_mtd_device(struct mtd_info *mtd)
  2. {
  3. struct mtd_notifier *not;
  4. int i, error;
  6. if (!mtd->backing_dev_info) {
  7. switch (mtd->type) {
  8. case MTD_RAM:
  9. 			mtd->backing_dev_info = &mtd_bdi_rw_mappable;
  10. break;
  11. case MTD_ROM:
  12. 			mtd->backing_dev_info = &mtd_bdi_ro_mappable;
  13. break;
  14. default:
  15. 			mtd->backing_dev_info = &mtd_bdi_unmappable;
  16. break;
  17. 		}
  18. 	}
  20. 	BUG_ON(mtd->writesize == 0);
  21. 	mutex_lock(&mtd_table_mutex);
  23. 	i = idr_alloc(&mtd_idr, mtd, 0, 0, GFP_KERNEL);
  24. if (i < 0)
  25. goto fail_locked;
  27. 	mtd->index = i;
  28. 	mtd->usecount = 0;
  30. /* default value if not set by driver */
  31. if (mtd->bitflip_threshold == 0)
  32. 		mtd->bitflip_threshold = mtd->ecc_strength;
  34. if (is_power_of_2(mtd->erasesize))
  35. 		mtd->erasesize_shift = ffs(mtd->erasesize) - 1;
  36. else
  37. 		mtd->erasesize_shift = 0;
  39. if (is_power_of_2(mtd->writesize))
  40. 		mtd->writesize_shift = ffs(mtd->writesize) - 1;
  41. else
  42. 		mtd->writesize_shift = 0;
  44. 	mtd->erasesize_mask = (1 << mtd->erasesize_shift) - 1;
  45. 	mtd->writesize_mask = (1 << mtd->writesize_shift) - 1;
  47. /* Some chips always power up locked. Unlock them now */
  48. if ((mtd->flags & MTD_WRITEABLE) && (mtd->flags & MTD_POWERUP_LOCK)) {
  49. 		error = mtd_unlock(mtd, 0, mtd->size);
  50. if (error && error != -EOPNOTSUPP)
  51. 			printk(KERN_WARNING
  52. "%s: unlock failed, writes may not work\n",
  53. mtd->name);
  54. 	}
  56. /* Caller should have set dev.parent to match the
  57. 	* physical device.
  58. 	*/
  59. 	mtd->dev.type = &mtd_devtype;
  60. 	mtd->dev.class = &mtd_class;
  61. 	mtd->dev.devt = MTD_DEVT(i);
  62. 	dev_set_name(&mtd->dev, "mtd%d", i);
  63. 	dev_set_drvdata(&mtd->dev, mtd);
  64. if (device_register(&mtd->dev) != 0)
  65. goto fail_added;
  67. if (MTD_DEVT(i))
  68. 		device_create(&mtd_class, mtd->dev.parent,
  69. MTD_DEVT(i) + 1,
  70. NULL, "mtd%dro", i);
  72. 	pr_debug("mtd: Giving out device %d to %s\n", i, mtd->name);
  73. /* No need to get a refcount on the module containing
  74. 	the notifier, since we hold the mtd_table_mutex */
  75. 	list_for_each_entry(not, &mtd_notifiers, list)
  76. not->add(mtd);
  78. 	mutex_unlock(&mtd_table_mutex);
  79. /* We _know_ we aren't being removed, because
  80. 	our caller is still holding us here. So none
  81. 	of this try_ nonsense, and no bitching about it
  82. 	either. :) */
  83. 	__module_get(THIS_MODULE);
  84. return 0;
  86. fail_added:
  87. 	idr_remove(&mtd_idr, i);
  88. fail_locked:
  89. 	mutex_unlock(&mtd_table_mutex);
  90. return 1;
  91. }

7. 未完成的问题：

1. nandflash bbt表的扫描分析；

2. 文件系统对nandflash访问的层次问题；

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