BEOL

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Back-end-of-line (BEOL) denotes the second portion of IC fabricationwhere the individual devices (transistors, capacitors, resistors, etc.)get interconnected with wiring on the wafer. BEOL generally begins whenthe first layer of metal is deposited on the wafer. It includescontacts, insulating layers (dielectrics), metal levels, and bonding sites for chip-to-package connections.

After a FEOL step there is a waferwith isolated transistors (without any wires). In BEOL part offabrication stage contacts (pads), interconnect wires, vias anddielectric structures are formed. For modern IC process, more than 10metal layers can be added in the BEOL.

Steps of the BEOL:

1. Silicidation of source and drain regions and the polysilicon region.
2. Adding a dielectric (first, lower layer is Pre-Metal dielectric, PMD - to isolate metal from silicon and polysilicon), CMP processing it
3. Make holes in PMD, make a contacts in them.
4. Add metal layer 1
5. Add a second dielectric (this time it is Intra-Metal dielectric)
6. Make vias through dielectric to connect lower metal with higher metal. Vias filled by Metal CVD process.

   Repeat steps 4-6 to get all metal layers.

7. Add final passivation layer to protect the microchip

After BEOL there is a "Backend process" (also called post-fab), whichis done not in the cleanroom, often by different company. It includes wafer test, wafer backgrinding, die separation, die tests, IC packaging and final test.